xr16c2850im Exar Corporation, xr16c2850im Datasheet - Page 49

• Manufacturer Part Number: xr16c2850im
• Description: Dual Uart With Tx And Rx Fifo Counters, 128 Bytes Of Fifos And Automatic Rs-485 Half Duplex Control
• Manufacturer: Exar Corporation

xr
REV. 2.1.3
REVISION HISTORY
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to
improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any
circuits described herein, conveys no license under any patent or other right, and makes no representation that
the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration
purposes and may vary depending upon a user’s specific application. While the information in this publication
has been carefully checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the
failure or malfunction of the product can reasonably be expected to cause failure of the life support system or
to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless
EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has
been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately
protected under the circumstances.
Copyright 2005 EXAR Corporation
Datasheet November 2005.
Send your UART technical inquiry with technical details to hotline: [e-mail].
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
February 2000
April 2002
May 2004
February 2005
August 2005
November 2005
Date
Rev 1.0.0
Rev 2.0.0
Rev 2.1.0
Rev 2.1.1
Rev 2.1.2
Rev 2.1.3
Revision
Initial datasheet.
Changed to standard style format. Internal Registers are described in the order they
are listed in the Internal Register Table. Clarified timing diagrams. Corrected Auto
RTS Hysteresis table. Renamed Rclk (Receive Clock) to Bclk (Baud Clock) and tim-
ing symbols. Added T
Changed to single column format. Added device status to ordering information.
Clarified sleep mode conditions. Clarified pin descriptions- changed from using logic
1 and logic 0 to HIGH (VCC) and LOW (GND) for input and output pin descriptions.
Added VOL sink current and VOH source current charts (
Figure 15
tolerant inputs (except for XTAL1) and have 0 ns address hold time (T
ister was updated to 0x06.
Corrected datasheet to show that all inputs are 5V tolerant (including XTAL1) in
devices with top mark date code of "F2 YYWW" and newer.
Removed discontinued 40-pin PDIP from Ordering Information.
Corrected part numbers in Ordering Information.
). Devices with top mark date code of "F2 YYWW" and newer have 5V
NOTICE
AH
49
2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS
, T
CS
and OSC.
Description
Figure 14
and
AH
XR16C2850
). DREV reg-