W83194R-58 WINBOND [Winbond], W83194R-58 Datasheet - Page 2

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W83194R-58

Manufacturer Part Number
W83194R-58
Description
100 MHZ AGP CLOCK FOR VIA CHIPSET
Manufacturer
WINBOND [Winbond]
Datasheet
3.0 PIN CONFIGURATION
4.0 BLOCK DIAGRAM
CPU_STOP#
CPU3.3#_2.5
CPU_STOP#/SDRAM11
PCI_STOP#
PCI_STOP#/SDRAM10
*SD_SEL#
* REF0/CPU3.3#_2.5
*FS(0:2) 3
*MODE
*SDATA
*SCLK
X1
X2
PCICLK_F/*FS1
PCICLK0/*FS2
SDRAM 9
SDRAM 8
PCICLK2
PCICLK3
PCICLK4
PCICLK1
SDATA
SDCLK
VDDq3
VDDq3
VDDq3
AGP0
VDD
Vss
Xout
Vss
Vss
Vss
Xin
PLL2
Spectrum
POR
Spread
XTAL
OSC
PLL1
LATCH
~
Control
Config.
Logic
Reg.
~
16
10
11
12
13
14
15
17
18
19
20
21
22
23
24
1
2
3
4
6
7
9
5
8
5
PCI_STOP#
CPU_STOP#
¡Ò 2
- 2 -
PCI
clock
Divder
Preliminary W83194R-37/-58
STOP
STOP
STOP
33
32
31
30
29
28
27
26
25
48
47
46
45
43
42
41
40
39
37
35
34
44
38
36
SDRAM 1
48MHz/*FS0
24MHz/*MODE
VDDq2
b CPUCLK2
CPUCLK3
SDRAM 0
SDRAM 2
SDRAM 3
SDRAM 4
SDRAM 5
VDDq3
SDRAM 6
SDRAM 7
Vss
AGP1
REF1/*SD_SEL#
Vss
CPUCLK0
Vss
VDDq3
Vss
CPUCLK1
VDDq2
2
12
3
4
5
2
48MHz
24MHz
REF(0:1
)
AGP(0:1)
CPUCLK(0:3)
SDRAM(0:11)
PCICLK(0:4)
PCICLK_F

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