W83194R-58 WINBOND [Winbond], W83194R-58 Datasheet - Page 7

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W83194R-58

Manufacturer Part Number
W83194R-58
Description
100 MHZ AGP CLOCK FOR VIA CHIPSET
Manufacturer
WINBOND [Winbond]
Datasheet
8.3 Serial Control Registers
The Pin column lists the affected pin number and the @PowerUp column gives the state at true
power up. Registers are set to the values shown only on true power up. "Command Code" byte and
"Byte Count" byte must be sent following the acknowledge of the Address Byte. Although the data
(bits) in these two bytes are considered "don't care", they must be sent and will be acknowledge. After
that, the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and
acknowledged.
8.3.1 Register 0: CPU Frequency Select Register
W83194R-37 Frequency table selection by software via I
SSEL2
BIT
7
6
5
4
3
2
2
1
0
0
0
0
0
1
1
1
1
@POWERUP
SSEL1
0
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
SSEL0
0
1
0
1
0
1
0
1
PIN
-
-
-
-
-
-
-
-
-
CPU(MHz)
66.8
68.5
83.3
100
0 = 1.5% Spread Spectrum Modulation (W83194R-37)
1 = 0.5% Spread Spectrum Modulation
0 = 0.25% Center Type Spread Spectrum Modulation (W83194R-58)
1 = 0.5% Center Type Spread Spectrum Modulation
SSEL2 (Frequency table selection by software via I
SSEL1 (Frequency table selection by software via I
SSEL0 (Frequency table selection by software via I
0 = Selection by hardware
1 = Selection by software I
SSEL3 (Frequency table selection by software via I
W83194R-58)
0 = Spread spectrum center type (W83194R-37)
1 = Spread spectrum down type (W83194R-37)
0 = Normal
1 = Spread Spectrum enabled
0 = Running
1 = Tristate all outputs
60
75
75
95
SD_SEL=1
SDRAM
68.5
83.3
66.8
100
- 7 -
60
75
75
95
Preliminary W83194R-37/-58
SD_SEL=0
(MHz)
66.8
68.5
66.6
63.4
66.6
DESCRIPTION
2
60
75
60
2
C
C - Bit 6:4
Publication Release Date: April 1999
(MHz)
34.25
33.4
37.5
33.3
31.7
33.3
PCI
30
30
(MHz)
AGP
66.8
68.5
66.6
63.4
66.6
75
60
60
2
2
2
2
C)
C)
C)
C for
REF (MHz)
Revision A1
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318

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