MPC860DP FREESCALE [Freescale Semiconductor, Inc], MPC860DP Datasheet - Page 60

• Manufacturer Part Number: MPC860DP
• Description: Hardware Specifications
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

CPM Electrical Characteristics
60
(Output)
RSTRT
RCLK1
(Input)
TENA(RTS1)
RxD1
NOTES:
RENA(CD1)
1.
2.
REJECT
(NOTE 2)
(Output)
Transmit clock invert (TCI) bit in GSMR is set.
If RENA is deasserted before TENA, or RENA is not asserted at all during transmit, then the
CSL bit is set in the buffer descriptor at the end of the frame transmission.
TCLK1
(Input)
(Input)
TxD1
0
128
Figure 61. CAM Interface Receive Start Timing Diagram
133
131
Figure 62. CAM Interface REJECT Timing Diagram
Start Frame De-
Figure 60. Ethernet Transmit Timing Diagram
MPC860 Family Hardware Specifications, Rev. 7
1
128
1
137
121
BIT1
125
132
129
BIT2
136
Freescale Semiconductor
134