LAN9217-MT-E2 SMSC [SMSC Corporation], LAN9217-MT-E2 Datasheet - Page 11

• Manufacturer Part Number: LAN9217-MT-E2
• Description: 16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
• Manufacturer: SMSC [SMSC Corporation]

16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Datasheet
SMSC LAN9217
1.2
1.3
1.4
16-bit SRAM I/F
PME - Wakup Indicator
FIFO_SEL
IRQ
This section provides an overview of each of these functional blocks as shown in Figure 1.2, "Internal
Block Diagram".
The LAN9217 integrates an IEEE 802.3 physical layer for twisted pair Ethernet applications. The PHY
can be configured for either 100 Mbps (100Base-TX) or 10 Mbps (10Base-T) Ethernet operation in
either full or half duplex configurations. The PHY block supports HP Auto-MDIX and auto-negotiation.
Minimal external components are required for the utilization of the Integrated PHY.
The transmit and receive data paths are separate within the MAC allowing the highest performance
especially in full duplex mode. The data paths connect to the PIO interface Function via separate
busses to increase performance. Payload data as well as transmit and receive status is passed on
these busses.
A third internal bus is used to access the MAC’s Control and Status Registers (CSR’s). This bus is
accessible from the host through the PIO interface function.
On the backend, the MAC interfaces with the internal 10/100 PHY through a the MII (Media
Independent Interface) port internal to the LAN9217. The MAC CSR's also provides a mechanism for
accessing the PHY’s internal registers through the internal SMI (Serial Management Interface) bus.The
Ethernet MAC can also communicate with an external PHY. This mode however, is optional.
Internal Block Overview
10/100 Ethernet PHY
10/100 Ethernet MAC
Power Management
Host Bus Interface
PIO Controller
Controller
GP Timer
Interrupt
(HBI)
Figure 1.2 Internal Block Diagram
Configurable RX FIFO
Configurable TX FIFO
RX Status FIFO
TX Status FIFO
2kB to 14kB
2kB to 14kB
3.3V to 1.8V
Regulator
DATASHEET
+3.3V
11
25MHz
PLL
Ethernet
Buffer - 128 bytes
Buffer - 2K bytes
MIL - TX Elastic
MIL - RX Elastic
10/100
MAC
Controller
(Optional)
EEPROM
EEPROM
External PHY - MII
Revision 1.5 (07-18-06)
Ethernet
10/100
PHY
Interface
Optional
LAN