LAN9217-MT-E2 SMSC [SMSC Corporation], LAN9217-MT-E2 Datasheet - Page 114

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LAN9217-MT-E2

Manufacturer Part Number
LAN9217-MT-E2
Description
16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Manufacturer
SMSC [SMSC Corporation]
Datasheet
Revision 1.5 (07-18-06)
5.5.9
ADDRESS
15-8
MODE
7:5
4:0
000
001
010
100
101
011
110
111
Special Modes
Reserved
MODE: PHY Mode of operation. Refer to
PHYAD: PHY Address:
The PHY Address is used for the SMI address.
10Base-T Half Duplex. Auto-negotiation disabled.
10Base-T Full Duplex. Auto-negotiation disabled.
100Base-TX Half Duplex. Auto-negotiation disabled.
CRS is active during Transmit & Receive.
100Base-TX Full Duplex. Auto-negotiation disabled.
CRS is active during Receive.
100ase-TX Half Duplex is advertised. Auto-
negotiation enabled.
CRS is active during Transmit & Receive.
Repeater mode. Auto-negotiation enabled.
100Base-TX Half Duplex is advertised.
CRS is active during Receive.
Reserved - Do not set the LAN9217 in this mode.
All capable. Auto-negotiation enabled.
Index (In Decimal):
MODE DEFINITIONS
Table 5.9 MODE Control
DESCRIPTION
18
DATASHEET
114
Table 5.9
16-bit High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX
Size:
for more details.
DEFAULT REGISTER BIT VALUES
REGISTER 0
[13,12,10,8]
X10X
0000
0001
1000
1001
1100
1100
N/A
16-bits
NASR
NASR
NASR
TYPE
RW,
RW,
RW,
REGISTER 4
[8,7,6,5]
SMSC LAN9217
0100
0100
1111
N/A
N/A
N/A
N/A
N/A
DEFAULT
Table 5.9
00001b
Datasheet
See

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