SSD1339U3 ETC1 [List of Unclassifed Manufacturers], SSD1339U3 Datasheet - Page 30

• Manufacturer Part Number: SSD1339U3
• Description: 132RGB x 132 with 2 smart Icon lines Dot Matrix OLED/PLED Segment/Common Driver with Controller
• Manufacturer: ETC1 [List of Unclassifed Manufacturers]

D/C
Solomon Systech
0
1
0
0
1
0
0
0
1
0
1
0
1
1
1
1
1
1
1
.AE[7:0] AE
AE~AF
AF[7:0] AF
A4~A7
A[7:0]
A[7:0]
A[7:0]
A[7:0]
A[7:0]
B[7:0]
Hex
AD
A2
B0
B1
B3
B8
.
.
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D7 D6 D5 D4 D3 D2 D2 D0
A
A
A
A
B
1
1
1
1
1
1
0
1
1
1
.
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7
7
7
7
7
7
7
AE
AF
A
A
A
A
B
0
0
0
0
0
0
0
0
0
0
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.
6
6
6
6
6
6
6
AE
AF
A
A
A
A
B
1
1
1
0
1
1
0
1
1
1
.
.
.
5
5
5
5
5
5
5
AE
AF
A
A
A
A
A
B
0
0
0
0
0
1
1
1
1
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.
4
4
4
4
4
4
4
4
AE
AF
A
A
A
A
A
B
0
0
1
1
1
0
0
0
1
.
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.
3
3
3
3
3
3
3
3
AE
AF
A
A
A
A
A
A
B
0
1
1
1
0
0
0
0
.
.
.
2
2
2
2
2
2
2
2
2
AE
AF
A
A
A
A
A
A
B
X
1
0
1
0
0
1
0
.
.
.
1
1
1
1
1
1
1
1
1
1
AE
AF
A
X
A
X
A
A
A
A
B
0
1
0
1
1
0
.
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.
0
0
0
0
0
0
0
0
0
0
0
Front Clock Divider
(DivSet)/ Oscillator
Set Display Offset
Look Up Table for
Set Display Mode
Set Reset (Phase
Gray Scale Pulse
(Phase 2) period
Set Sleep mode
1) /Pre-charge
Power Saving
Configuration
Command
Frequency
Master
On/Off
Mode
width
Jul 2005
Set vertical scroll by Row from 0-131. [reset=00b]
A4: All Off
A5: All On (All pixels have GS15)
A6 : Reset to normal display (POR)
A7: Inverse Display (GS0 -> GS63, GS1 -> GS62, ....)
A[7:0] should be set as 100011A[1]A[0]b
A[0]= 0 Select external VCC supply at master ON
A[0] = 1 Select internal booster at master ON [reset]
A[1]= 0 Select external VCOMH voltage supply at master
ON
A[1] = 1 Select internal VCOMH regulator at master ON
[reset]
A[2] = 0 Select external pre-charge voltage source
A[2] = 1 Select internal pre-charge voltage source [reset]
AE = Sleep mode On (Display off)
AF = Sleep mode Off (Display on)
A[4:0]:
00000b = Normal
10010b = Power Saving
00101b = Reserved
A[3:0] Phase 1 period of 1~16 dclk clocks [reset=4h]
A[7:4] Phase 2 period of 1~16 dclk clocks [reset=7h]
A[3:0] [reset=0], divide by DIVSET+1 (i.e. 1 to 16)
A[7:4] Osc frequency, frequency increase as level
The next 32 bytes of command set the current drive
A[7:0] : PW1, POR =1 DCLK
B[7:0] : PW3, POR = 5 DCLK
C[7:0] : PW5, POR = 9 DCLK
AE[7:0] : PW61, POR = 121 DCLK
AF[7:0] : PW63, POR = 123 DCLK
increase [reset=1001b]
pulse width of gray scale level GS1, GS3, GS5 …GS63
as below in unit of DCLK.
where
PW1 must > 0
PW3 must > PW1+1
.
.
P 30/59 Rev 1.1
Description
SSD1339