LH540235M-20 SHARP [Sharp Electrionic Components], LH540235M-20 Datasheet - Page 30

• Manufacturer Part Number: LH540235M-20
• Description: 2048 x 18 / 4096 x 18 Synchronous FIFOs
• Manufacturer: SHARP [Sharp Electrionic Components]

LH540235/45
TIMING DIAGRAMS (cont’d)
30
Enhanced Operating Mode Timing Diagram
NOTES:
1. t
2. PAF offset = p. Number of data words written into FIFO already = 2047 - p
3. The internal state of the FIFO:
Q
D
0
0
WCLK
RCLK
rising WCLK edge for PAF to change predictably during the current
clock cycle. If the time between the rising edge of RCLK and the
rising edge of WCLK is less than t
that PAF will change state until the next following WCLK edge.
for the LH540235 and 4095 - p for the LH540245.
At
At
At
WEN
SKEW1
- Q
- D
PAF
REN
OE
17
17
A
C
B
is the minimum time between a rising RCLK edge and a
, 2047 - p words in FIFO for LH540235 and 4095 - p words in FIFO for LH540245.
, 2048 - p words in FIFO for LH540235 and 4096 - p words in FIFO for LH540245.
, again 2047 - p words in FIFO for LH540235 and 4095 - p words in FIFO for LH540245.
LOW
NO WRITE
OUTPUT REGISTER
t
ENS
DATA IN
A
t
t
ENH
SKEW1
Figure 17. Programmable-Almost-Full-Flag Timing,
When Synchronous (Enhanced Operating Mode )
t
A
(1)
SKEW1
, then it is not guaranteed
t
B
DS
DATA WRITE
t
PAFS
DATA READ
NO WRITE
t
PAFS
t
ENS
C
t
t
ENH
SKEW1
2048 x 18/4096 x 18 Synchronous FIFOs
t
A
(1)
DATA WRITE
DATA READ
NEXT
t
DS
t
PAFS
540235-24