LH540235M-20 SHARP [Sharp Electrionic Components], LH540235M-20 Datasheet - Page 34

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LH540235M-20

Manufacturer Part Number
LH540235M-20
Description
2048 x 18 / 4096 x 18 Synchronous FIFOs
Manufacturer
SHARP [Sharp Electrionic Components]
Datasheet
TIMING DIAGRAMS (cont’d)
LH540235/45
34
Q [17:0]
NOTES:
FL/RT
RCLK
1. It is not necessary for REN to be LOW for the device to recognize a retransmit request.
2. In order to actually read data words from the memory arrary, in IDT-Compatible
3. D
4. The asynchronous intermediate flags (corresponding to LOW Control-Register bits) will
5. The intermediate flags which have been synchronized to RCLK, by setting the appropriate
6. The intermediate flags which have been synchronized to WCLK, by setting the appropriate
7. Immediately after a reset operation, before any write operations have taken place, a retransmit
8. In the special case that the FIFO memory array contains only one valid data item, the status
REN
PAF
PAE
HF
EF
FF
Operating Mode, REN = LOW; in Enhanced Operating Mode, also REN
(and OE = LOW, if Control Register bit 05 = HIGH). In any case, LD = HIGH.
show correct status three RCLK cycles after a retransmit operation, as is shown above.
(RT
Control-Register bits to HIGH will show correct status after
retransmit operation. (RT
Control-Register bits HIGH, will show correct status on the second WCLK rising edge after
assuming that t
WCLK rising edge after
operation is a 'no-op', and does not change the state of any FIFO registers or flags.
of HF and PAF should be ignored on a retransmit.
RT1
1
3
, in the above RCLK waveform.)
is the data item in physical location zero of the FIFO memory array.
PREVIOUS VALID FF
PREVIOUS VALID PAF
PREVIOUS VALID HF
PREVIOUS VALID PAE
PREVIOUS VALID EF
R
1
SKEW1
t
A
was satisfied at
A
4
, in the above RCLK waveform.)
.
D
R1
t
ENS
R
2
t
A
A
; otherwise the flags will become valid on the third
IDT-Compatible Operating Mode
t
Figure 21. Retransmit Timing,
RSF
RT
1
B
t
ENH
, four RCLK cycles after a
D
t
ENS
R2
RT
2
2
UNKNOWN
UNKNOWN
UNKNOWN
= HIGH
2048 x 18/4096 x 18 Synchronous FIFOs
A
RT
,
3
t
A
A
t
t
t
t
PAF
PAE
t
WFF
REF
HF
D
RT1
RT
NEW VALID FF
NEW VALID PAF
NEW VALID HF
NEW VALID PAE
NEW VALID EF
2
4
t
A
B
D
540235-28
RT2

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