SSTUB32866EC/G,518 NXP Semiconductors, SSTUB32866EC/G,518 Datasheet - Page 11

IC REG BUFFER 25BIT 96-LFBGA

SSTUB32866EC/G,518

Manufacturer Part Number
SSTUB32866EC/G,518
Description
IC REG BUFFER 25BIT 96-LFBGA
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SSTUB32866EC/G,518

Logic Type
1:1, 1:2 Configurable Registered Buffer with Parity
Package / Case
96-LFBGA
Supply Voltage
1.7 V ~ 2 V
Number Of Bits
25, 14
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Logic Family
SSTU
Number Of Circuits
1
Maximum Clock Frequency
450 MHz
Propagation Delay Time
1.5 ns
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Supply Voltage (max)
2 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.7 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-3543-2
935281279518
SSTUB32866EC/G-T

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SSTUB32866EC/G,518
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
9. Recommended operating conditions
Table 7.
[1]
[2]
SSTUB32866_4
Product data sheet
Symbol
V
V
V
V
V
V
V
V
V
V
V
V
I
I
T
OH
OL
amb
DD
ref
T
I
IH(AC)
IL(AC)
IH(DC)
IL(DC)
IH
IL
ICR
ID
The RESET and Cn inputs of the device must be held at valid levels (not floating) to ensure proper device operation.
The differential inputs must not be floating, unless RESET is LOW.
Parameter
supply voltage
reference voltage
termination voltage
input voltage
AC HIGH-level input voltage
AC LOW-level input voltage
DC HIGH-level input voltage
DC LOW-level input voltage
HIGH-level input voltage
LOW-level input voltage
common mode input voltage
range
differential input voltage
HIGH-level output current
LOW-level output current
ambient temperature
Recommended operating conditions
All information provided in this document is subject to legal disclaimers.
Conditions
data (Dn), CSR, and
PAR_IN inputs
data (Dn), CSR, and
PAR_IN inputs
data (Dn), CSR, and
PAR_IN inputs
data (Dn), CSR, and
PAR_IN inputs
RESET, Cn
RESET, Cn
CK, CK
CK, CK
operating in free air
SSTUB32866EC/G
SSTUB32866EC/S
Rev. 04 — 15 April 2010
1.8 V DDR2-800 configurable registered buffer with parity
[1]
[1]
[2]
[2]
Min
1.7
0.49 × V
V
0
V
-
V
-
0.65 × V
-
0.675
600
-
-
0
0
ref
ref
ref
− 0.040
+ 0.250
+ 0.125
DD
DD
Typ
-
0.50 × V
V
-
-
-
-
-
-
-
-
-
-
-
-
-
ref
SSTUB32866
DD
Max
2.0
0.51 × V
V
V
-
V
-
V
-
0.35 × V
1.125
-
−8
8
70
85
© NXP B.V. 2010. All rights reserved.
ref
DD
ref
ref
+ 0.040
− 0.250
− 0.125
DD
DD
11 of 30
Unit
V
V
V
V
V
V
V
V
V
V
V
mV
mA
mA
°C
°C

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