MAX11040KGUU+T Maxim Integrated, MAX11040KGUU+T Datasheet - Page 15

• Manufacturer Part Number: MAX11040KGUU+T
• Description: Analog to Digital Converters - ADC 24Bit 4Ch Simul-Samp Cascadable Sig Delt
• Manufacturer: Maxim Integrated

Specifications of MAX11040KGUU+T

• Rohs: yes
• Number Of Channels: 4
• Architecture: Sigma-Delta
• Conversion Rate: 64 KSPs
• Resolution: 24 bit
• Input Type: Differential
• Snr: 106 dB, 117 dB
• Interface Type: 4-Wire (SPI, Microwire), QSPI
• Operating Supply Voltage: 2.7 V to 3.6 V, 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Maximum Power Dissipation: 1096 mW
• Minimum Operating Temperature: - 40 C
• Number Of Converters: 4
• Voltage Reference: Internal 2.2 V

When the analog input voltage changes between the
ADC full scale and the fault threshold faster than the
latency of the converter, OVRFLW goes low with the
FAULT output. OVRFLW remains invalid until a valid
clock frequency is available at XIN.
With overvoltage-fault protection enabled (FAULTDIS =
0), FAULT immediately transitions from a high to low
when any of the analog inputs go outside the voltage
range bounded by the fault-detection thresholds V
and V
Once the analog inputs return back within the fault
thresholds, the FAULT interrupt output goes high after a
delay called the fault-recovery time. The fault-recovery
time is:
where t
f
In the event the analog input voltage changes between
the ADC full scale and the fault threshold faster than
Figure 4. High-Frequency Analog Input Overvoltage Detection and Recovery
Maxim Integrated
XINCLOCK
Overvoltage-Fault Detection and Recovery (FAULT)
20 x t
NFT
DOUT
FAULT
OVRFLW
.
DOUT
DISCONTINUITY
and the selected output data rate.
DETECTION
is the data output period determined by
24-/16-Bit, 4-Channel, Simultaneous-Sampling,
< fault-recovery time < 25 x t
LATENCY
LATENCY
DOUT
|AIN+ - AIN-|
DIGITAL OUTPUT
DATA AT DOUT
Cascadable, Sigma-Delta ADCs
PFT
MAX11040K/MAX11060
the latency of the converter, the ADC conversion result
prematurely jumps to the full-scale value when a fault is
detected (see Detection Discontinuity in Figure 4).
During a fault condition and the subsequent fault-
recovery time, the ADC conversion result remains at full
scale. This creates a discontinuity in the digital conver-
sion result only if the fault recovery time is greater than
the latency plus the time that the input changes
between the fault threshold and the ADC full scale (see
Recovery Discontinuity in Figure 4). Neither of these
steps occur if the fault-protection circuitry is disabled
(FAULTDIS = 1), or if the input is slow relative to the
above descriptions (see Figure 5).
For data rates faster than 32ksps (FSAMPC = 111), the
converter output may contain invalid data for up to
188μs after FAULT returns high. To prevent this behav-
ior, disable the overvoltage-fault protection by setting
the FAULTDIS bit in the configuration register to 1 when
using FSAMPC = 111, and limit the analog input swing
to ±3.5V.
RECOVERY TIME
DISCONTINUITY
RECOVERY
LATENCY
LATENCY
FAULT-DETECTION
FULL SCALE
(|0.88V
(V
THRESHOLD
PFT
OR |V
REF
|)
NFT
|)
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