ATAES132-SH-EQ-T Atmel, ATAES132-SH-EQ-T Datasheet - Page 141

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ATAES132-SH-EQ-T

Manufacturer Part Number
ATAES132-SH-EQ-T
Description
EEPROM AES 32Kbit EE SPI
Manufacturer
Atmel
Datasheet

Specifications of ATAES132-SH-EQ-T

Rohs
yes
Maximum Clock Frequency
10 MHz
Operating Supply Voltage
6 V
Maximum Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-8
Interface Type
SPI
Factory Pack Quantity
4000
L.2.6.
L.3.
L.3.2.
I
To wakeup an ATAES132 configured for I
I
The ACK poll reply will change to ACK when the device is in the active state.
The ATAES132 will not accept any commands while it is "busy". The ATAES132 will NAK the I
not match the internal I
The wakeup process begins when a device in the standby or sleep state receives an I
I
after wakeup time t
wakeup ready time of t
matching I
Table 9-5.
Understanding the ChipState Register
The info command (see Section 7.12) provides access to the ChipState register. The ChipState register value indicates if the
device has recently experienced a power up event or wakeup from the sleep power state. This information can be useful for
determining how to recover from an unexpected transaction error.
Table L-41. Description of the ChipState register value returned by the info command
Notes:
ChipState = Power Up
The following events cause the ChipState register to be set to the power up state (0xFFFF). The events in this table cause the
device to be initialized and placed in the power state specified in the ChipConfig register. (see Section L.2.1)
Table L-42. Description of events causing the ChipState register to be set to 0xFFFF
2
2
2
ChipState
0x0000
0x5555
0xFFFF
Event
Power up
Power interruption
C device address. The ATAES132 will answer the ACK poll with an I
C device address that matches the ATAES132 I
C WakeUp
1.
2
C address is received, and end when the device enters the active state. The wakeup timing specifications are in
The following subsections describe the events which cause ChipState to change values, and events that do not
change ChipState
Description
ChipState
ChipState
ChipState
WupSB.STATUS
WupSB.RDY
2
C device address, and will not wakeup if a non-matching I
Event description
Power up of the device (Section L.2.1)
Power interruption or brownout resulting in device reset
= Active. Device has remained Active since the previous Crypto command was processed
= "Wakeup from sleep". Device has experienced a wakeup from the sleep power state
= Power up. Device has experienced a power up event since the previous Crypto command
for the standby state, or t
for the standby state, or t
since the previous Crypto command was processed
was processed
2
C interface mode, the host is required to perform ACK polling using the matching
(1)
2
CAddr register. The device is ready to receive an ACK poll from the host
WupSL.STATUS
WupSL.RDY
for the sleep state – t
2
for the sleep state. The wakeup is complete after the
C NAK to indicate the device is "busy" during wakeup.
Atmel ATAES132 Preliminary Datasheet
2
C device address is received.
2
(1)
C start signal followed immediately by a
WupSB.RDY
2
C device address if it does
/ t
WupSL.RDY
8760A−CRYPTO−5/11
begin when a
(1)
141

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