ATAES132-SH-EQ-T Atmel, ATAES132-SH-EQ-T Datasheet - Page 8

• Manufacturer Part Number: ATAES132-SH-EQ-T
• Description: EEPROM AES 32Kbit EE SPI
• Manufacturer: Atmel

Specifications of ATAES132-SH-EQ-T

• Rohs: yes
• Maximum Clock Frequency: 10 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Interface Type: SPI
• Factory Pack Quantity: 4000

1.4.2.
Device Status Register (STATUS)
The device status register is used for handshaking between the host microcontroller and the ATAES132. The host
microcontroller is expected to read the STATUS Register before sending a command or reading a response.
The read-only device status register at address 0xFFF0 reports the current status of the ATAES132 device. This register can
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be read with the standard I
C or SPI read memory commands. The SPI read status register command can also be used to
read the STATUS register as described in Section K.3.6.
Reading the STATUS register does not increment the memory read address, so a host microcontroller can easily monitor the
ATAES132 device status by repeatedly reading the STATUS register. See Appendix G for a detailed description of the
STATUS register bits and status bit behavior.
Table 1-3.
Device status register definition
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
EERR
RRDY
Reserved
CRCE
Reserved
WAKEb
WEN
WIP
The device status register can always be read when the ATAES132 is configured for SPI interface mode even if the
2
ATAES132 is processing a command or writing the EEPROM. When the ATAES132 is configured for I
C interface mode, the
2
host can read the STATUS register only when the I
C device address is ACKed.
If the ATAES132 is in the sleep or standby power state, reading the STATUS register forces the ATAES132 to wakeup; the
STATUS register is 0xFF until the wakeup process is complete.
Atmel ATAES132 Preliminary Datasheet
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8760A−CRYPTO−5/11