ATAES132-SH-EQ-T Atmel, ATAES132-SH-EQ-T Datasheet - Page 6

• Manufacturer Part Number: ATAES132-SH-EQ-T
• Description: EEPROM AES 32Kbit EE SPI
• Manufacturer: Atmel

Specifications of ATAES132-SH-EQ-T

• Rohs: yes
• Maximum Clock Frequency: 10 MHz
• Operating Supply Voltage: 6 V
• Maximum Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Interface Type: SPI
• Factory Pack Quantity: 4000

1.2.1.
1.3.
Byte Order
The ATAES132 device uses a “big-endian” coding scheme and utilizes the same bit and byte orders as the standard Serial
EEPROM. The byte order is identical to the NIST AES specifications (see Appendix A):
Abbreviations
The following abbreviations are used throughout this specification.
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The most significant bit of each byte is transmitted first on the bus
The most significant byte of multi-byte integers is transmitted prior to the least significant byte. This applies to the
All arrays are transmitted in index order, with byte index 0 first
Configuration fields that are more than eight bits appear on the bus during a read or write in the index order in which
AES (Advanced encryption standard)
AES-CCM
AES-ECB
Ciphertext
Cleartext
MAC (Message authentication code)
Nonce (Number used once)
Plaintext
RFU (Reserved for future use)
RNG (Random number generator)
CRC, address and other 16 bit command parameters.
they appear in this specification – the top byte in the input parameters table is byte[0] and appears first on the bus.
These fields are arrays of bytes, not multi-byte integers.
Block cipher algorithm standardized by NIST, with 128 bit block size
AES mode using the “Counter with Cipher Block Chaining-Message Authentication Code” algorithm
AES mode using the “Electronic Code Book” algorithm
Data communicated after it has been encrypted
Data communicated in a non-encrypted state
A 128 bit value used to validate the authenticity of ciphertext
A value used in cryptographic operations
Data which is either the input to encryption or the output of a decryption operation
Any feature, memory location, or bit that is held as reserved for future use by Atmel
Produces high-quality pseudo-random numbers
Atmel ATAES132 Preliminary Datasheet
8760A−CRYPTO−5/11
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