CY7C09569V-100AC Cypress Semiconductor Corp, CY7C09569V-100AC Datasheet - Page 15

IC SRAM 576KBIT 100MHZ 144LQFP

CY7C09569V-100AC

Manufacturer Part Number
CY7C09569V-100AC
Description
IC SRAM 576KBIT 100MHZ 144LQFP
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CY7C09569V-100AC

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Synchronous
Memory Size
576K (16K x 36)
Speed
100MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
144-LQFP
Density
576Kb
Access Time (max)
12.5ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
67MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
14b
Package Type
TQFP
Operating Temp Range
0C to 70C
Number Of Ports
2
Supply Current
385mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Word Size
36b
Number Of Words
16K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1189

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C09569V-100AC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C09569V-100AC
Manufacturer:
CYP
Quantity:
20 000
Switching Waveforms
Bus Match Pipelined Read-to-Write-to-Read (OE = V
Note:
Document #: 38-06054 Rev. *A
26. BM, SIZE, and BE must be reconfigured 1 cycle before operation is guaranteed. BM, SIZE, and BE should remain static for any particular port configuration.
ADDRESS
DATA
DATA
ADS
CLK
R/W
CE
OUT
IN
t
SA
t
t
SW
SC
A
n
t
CH2
READ
t
t
t
CYC2
HW
HC
t
HA
t
CL2
A
(continued)
n
1st Cycle
READ
t
CD2
1st Word
A
Q
n+1
n
2nd Cycle
READ
t
CD2
2nd Word
A
Q
n+1
n
Operation
IL
t
No
t
SD
CKHZ
)
[11, 14, 15, 16, 24, 25, 26]
1st Word
D
A
n+2
n+2
1st Cycle
WRITE
t
HD
2nd Word
A
D
n+2
n+2
2nd Cycle
WRITE
t
CKLZ
A
n+3
READ
A
n+3
1st Cycle
READ
t
CD2
1st Word
CY7C09569V
CY7C09579V
Q
A
n+4
n+3
2nd Cycle
t
DC
READ
Page 15 of 30
2nd Word
A
Q
n+4
n+3

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