MT48H8M32LFB5-75:H Micron Technology Inc, MT48H8M32LFB5-75:H Datasheet - Page 34

• Manufacturer Part Number: MT48H8M32LFB5-75:H
• Description: IC SDRAM 256MBIT 133MHZ 90VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H8M32LFB5-75:H

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 90-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PRECHARGE
Figure 25:
Power-Down
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
256mb_x16_sdram_y36m_1.fm - Rev G 6/09 EN
PRECHARGE Command
Fixed-length or continuous page WRITE bursts can be truncated with the BURST TER-
MINATE command. When truncating a WRITE burst, the input data applied coincident
with the BURST TERMINATE command will be ignored. The last data written (provided
that DQM is LOW at that time) will be the input data applied one clock previous to the
BURST TERMINATE command. This is shown in Figure 22 on page 32, where data n is
the last desired data element of a longer burst.
The PRECHARGE command (see Figure 25) is used to deactivate the open row in a par-
ticular bank or the open row in all banks. The bank(s) will be available for a subsequent
row access some specified time (
determines whether one or all banks are to be precharged, and in the case where only
one bank is to be precharged, inputs BA[1:0] select the bank. When all banks are to be
precharged, inputs BA[1:0] are treated as “Don’t Care.” Once a bank has been pre-
charged, it is in the idle state and must be activated prior to any READ or WRITE com-
mands being issued to that bank.
A[9:0], A11, A12
Power-down occurs if CKE is registered LOW coincident with a NOP or COMMAND
INHIBIT when no accesses are in progress. If power-down occurs when all banks are
idle, this mode is referred to as precharge power-down; if power-down occurs when
there is a row active in any bank, this mode is referred to as active power-down. Entering
power-down deactivates the input and output buffers, excluding CKE, for maximum
power savings while in standby. The device may not remain in the power-down state
longer than the refresh period (64ms) since no REFRESH operations are performed in
this mode.
BA[1:0]
RAS#
CAS#
WE#
CKE
A10
CLK
CS#
HIGH
VALID ADDRESS
Bank Selected
All Banks
ADDRESS
BANK
34
t
RP) after the precharge command is issued. Input A10
DON’T CARE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x16, x32 Mobile SDRAM
©2006 Micron Technology, Inc. All rights reserved.
Operations