N25Q128A13BF840F NUMONYX, N25Q128A13BF840F Datasheet - Page 44

• Manufacturer Part Number: N25Q128A13BF840F
• Description: IC SRL FLASH 128MB NMX 8-VDFPN
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of N25Q128A13BF840F

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 128M (16M x 8)
• Speed: 108MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Volatile and Non Volatile Registers
6.5.5
6.5.6
6.5.7
44/157
When the Program Status bit is High (FSR<4>=1) after a Program failure that means that
the P/E Controller has applied the maximum pulses number to the bytes and it still failed to
verify that the required data have been correctly programmed.
After an attempt to program '1' on '0', the FSR<4> only goes High (FSR<4>=1) if
VPP=VPPH and the data pattern is a multiple of 64 bits: if VPP is not VPPH, FSR<4>
remains Low and the attempt is not shown while if VPP is equal to VPPh but the pattern is
not a 64 bits multiple the bit 4 is Don't Care. The Program Status bit should be read once the
P/E Controller Status bit is High.
The Program Status bit is related to all possible program operations in the Extended SPI
protocol: Page Program, Dual and Quad Input Fast Program, Dual and Quad Input
Extended Fast Program, and OTP Program.
The Program Status bit is related to the following program operations in the DIO-SPI and
QIO-SPI protocols: Dual and Quad Command Page program and OTP program.
Once the bit is set High, it can only be reset Low (FSR<4>=0) by a Clear Flag Status
Register command (CLFSR). If set High it should be reset before a new Program command
is issued, otherwise the new command will appear to fail.
VPP Status bit
The bit 3 of the Flag Status Register represents the VPP Status bit. It indicates an invalid
voltage on the VPP pin during Program and Erase operations. The VPP pin is sampled at
the beginning of a Program or Erase operation.
If VPP becomes invalid during an operation, that is the voltage on VPP pin is below the
VPPH Voltage (9V), the VPP Status bit goes High (FSR<3>=1) and indeterminate results
can occur.
Once set High, the VPP Status bit can only be reset Low (FSR<3>=0) by a Clear Flag Status
Register command (CLFSR). If set High it should be reset before a new Program or Erase
command is issued, otherwise the new command will appear to fail.
Program Suspend Status bit
The bit 2 of the Flag Status register represents the Program Suspend Status bit, It indicates
that a Program operation has been suspended or is going to be suspended.
The bit is set (FSR<2>=1) within the Program Suspend Latency time, that is as soon as the
Program/Erase Suspend command (PES) has been issued, therefore the device may still
complete the operation before entering the Suspend Mode.
The Program Suspend Status should be considered valid when the P/E Controller bit is high
(FSR<7>=1).
When a Program/Erase Resume command (PER) is issued the Program Suspend Status bit
returns Low (FSR<2>=0)
Protection Status bit
The bit 1 of the Flag Status Register represents the Protection Status bit. It indicates that an
Erase or Program operation has tried to modify the contents of a protected array sector, or
that a modify operation has tried to access to a locked OTP space. The Protection Status bit
is related to all possible protection violations as follows:
The sector is protected by Software Protection Mode 1 (SPM1) Lock registers,
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2010 Micron Technology, Inc. All rights reserved.
N25Q128 - 3 V