PCF8534AH/1,518 NXP Semiconductors, PCF8534AH/1,518 Datasheet - Page 28

• Manufacturer Part Number: PCF8534AH/1,518
• Description: IC LCD DVR UNVRSL LOW-MUX 80LQFP
• Manufacturer: NXP Semiconductors

Specifications of PCF8534AH/1,518

• Package / Case: 80-LQFP
• Display Type: LCD
• Configuration: 60 Segment
• Interface: I²C
• Current - Supply: 8µA
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Digits: 30
• Number Of Segments: 240
• Maximum Clock Frequency: 400 KHz
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Power Dissipation: 400 mW
• Maximum Operating Temperature: + 85 C
• Maximum Supply Current: 50 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Details
• Other names: 935284829518; PCF8534AH/1-T; PCF8534AH/1-T

NXP Semiconductors
12. Dynamic characteristics
Table 17.
V
[1]
[2]
PCF8534A_3
Product data sheet
Symbol
Clock
Internal: output pin CLK
f
External: input pin CLK
f
t
t
Synchronization: input pin SYNC
t
t
Outputs: pins BP0 to BP3 and S0 to S59
t
I
Pin SCL
f
t
t
Pin SDA
t
t
Pins SCL and SDA
t
t
t
t
t
t
C
t
osc
clk(ext)
clk(H)
clk(L)
PD(SYNC_N)
SYNC_NL
PD(drv)
2
SCL
LOW
HIGH
SU;DAT
HD;DAT
BUF
SU;STO
HD;STA
SU;STA
r
f
w(spike)
DD
C-bus: timing
b
= 1.8 V to 5.5 V; V
Typical output (duty cycle = 50 %).
All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to V
input voltage swing of V
Dynamic characteristics
Parameter
oscillator frequency
external clock frequency
HIGH-level clock time
LOW-level clock time
SYNC propagation delay
SYNC LOW time
driver propagation delay
SCL frequency
LOW period of the SCL clock
HIGH period of the SCL clock
data set-up time
data hold time
bus free time between a STOP and
START condition
set-up time for STOP condition
hold time (repeated) START condition
set-up time for a repeated START
condition
rise time of both SDA and SCL signals
fall time of both SDA and SCL signals
capacitive load for each bus line
spike pulse width
[2]
SS
SS
= 0 V; V
to V
DD
LCD
.
= 2.5 V to 6.5 V; T
Rev. 03 — 10 November 2008
amb
Conditions
V
V
V
DD
DD
LCD
= 40 C to +85 C; unless otherwise specified.
= 5 V
= 5 V
= 5 V
Universal LCD driver for low multiplex rates
[1]
Min
960
797
130
130
-
1
-
-
1.3
0.6
100
0
1.3
0.6
0.6
0.6
-
-
-
-
Typ
1536
1536
-
-
30
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PCF8534A
© NXP B.V. 2008. All rights reserved.
Max
3046
3046
-
-
-
-
30
400
-
-
-
-
-
-
-
-
0.3
0.3
400
50
IL
and V
IH
28 of 44
Unit
Hz
Hz
ns
kHz
ns
ns
pF
ns
with an
s
s
s
s
s
s
s
s
s
s
s
s