IDT72V51333L7-5BB8 IDT, Integrated Device Technology Inc, IDT72V51333L7-5BB8 Datasheet - Page 40

• Manufacturer Part Number: IDT72V51333L7-5BB8
• Description: IC FLOW CTRL MULTI QUEUE 256-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT72V51333L7-5BB8

• Configuration: Dual
• Density: 512Kb
• Access Time (max): 4ns
• Word Size: 18b
• Organization: 4Kx18x8
• Sync/async: Synchronous
• Expandable: Yes
• Bus Direction: Uni-Directional
• Package Type: BGA
• Clock Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.15V
• Operating Supply Voltage (max): 3.45V
• Supply Current: 100mA
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 256
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 72V51333L7-5BB8

Cycle:
*A*
*AA* Device 0 is selected for the PAFn bus. The bus is currently providing status of a previously selected device X.
*B*
*BB* Queue 1 of device 0 is selected on the write port.
*C*
*CC* PAFn continues to show status of D0.
*D*
*DD* PAF[1] goes HIGH to show that D0 Q1 is not almost empty due to the read on cycle *C*.
*E*
*EE* Word, Wy+1 is written into D0 Q1.
*F*
*FF* PAF[1] and the discrete PAF flag go LOW to show the write on cycle *DD* causes Q1 of D0 to again go almost full.
*G*
IDT72V51333/72V51343/72V51353 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(8 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
Device 0
Device 0
Queue 1 of device 0 is selected for read operations.
The last word in the output register is available on Qout. OE was previously taken LOW so the output bus is in Low-Impedance.
Word, Wx+1 is read out from the previous queue due to the FWFT effect.
The PAFn bus is updated with the device selected on the previous cycle, device 0 PAF[1] is LOW showing the status of queue 1.
The PAFn outputs of the device previously selected on the PAFn bus go to High-Impedance.
Device 7 is selected for the PAFn bus.
Word, Wd-m+1 is read from Q1 D0 due to the FWFT operation. This read is at the PAFn boundary of queue D0 Q1. This read will cause the PAF[1] output to go from
LOW to HIGH (almost full to not almost full), after a delay t
No read operations occur, REN is HIGH.
The active queue PAF flag of device 0 goes from High-Impedance to Low-Impedance.
Word, Wy is written into D0 Q1.
Queue 2 of Device 6 is selected for write operations.
Word, Wd-m+2 is read out due to FWFT operation.
Word, Wy+2 is written into D0 Q1.
Word, W0 is read from Q0 of D6, selected on cycle *E*, due to FWFT.
Prev.
Bus
WRADD
WADEN
RDADD
RADEN
WCLK
RCLK
ESTR
FSTR
PAFn
PAFn
PAFn
WEN
Qout
REN
PAF
Din
OE
t
Previous Device
Previous Device
QS
t
AS
t
t
STS
AS
000 0001
Device 0
D0Q1
t
OLZ
*A*
*AA*
Figure 23. PAF
000 xxxx
t
Prev. Q
t
t
AH
QH
STH
t
W
AH
X
t
QS
t
HIGH-Z
AS
PAF
PAF
PAF
PAF n - Direct Mode, Flag Operation – Devices in Expansion
HIGH - Z
*B*
D0 Q1
*BB*
t
A
SKEW3
t
t
STS
PAFHZ
t
t
AS
Prev. Q
t
PAFLZ
t
AH
QH
W
+ WCLK + tPAF. If t
X +1
Device 7
111 xxxx
*C*
Device 0
Device 0
*CC*
t
A
t
SKEW3
1
t
t
AH
STH
40
xxxxxx0x
xxxxxx0x
SKEW3
t
ENS
*D*
t
DS
Word W
is violated add an extra WCLK cycle.
D0 Q1
*DD*
2
t
QS
t
DH
y
W
D0 Q1
t
t
PAF
PAFLZ
D-M+1
110 0010
D6Q2
*E*
t
DS
D0 Q1
Device 0
Device 0
W
*EE*
y+1
t
QH
t
HIGH-Z
DH
xxxxxx1x
xxxxxx1x
*F*
COMMERCIAL AND INDUSTRIAL
t
DS
t
D0 Q1
A
W
*FF*
y+2
TEMPERATURE RANGES
W
t
D0 Q1
DH
D - M + 2
t
ENH
t
t
PAF
*G*
Device 0
WAF
Device 0 xxxxxx0x
t
A
xxxxxx0x
D6 Q2
W
5940 drw25
0