IDT72P51777L7-5BBI IDT, Integrated Device Technology Inc, IDT72P51777L7-5BBI Datasheet - Page 8

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IDT72P51777L7-5BBI

Manufacturer Part Number
IDT72P51777L7-5BBI
Description
IC FLOW CTRL 40BIT 376-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT72P51777L7-5BBI

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
72P51777L7-5BBI

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Part Number:
IDT72P51777L7-5BBI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
DETAILED DESCRIPTION
MULTI-QUEUE STRUCTURE
single data output port with up to 128 FIFO queues in parallel buffering between
the two ports. The user can setup between 1 and 128 Queues within the device.
These queues can be configured to utilize the total available memory, providing
the user with full flexibility and ability to configure the queues to be various depths,
independent of one another.
MEMORY ORGANIZATION/ ALLOCATION
256 x40 bits. When the user is configuring the number of queues and individual
queue sizes the user must allocate the memory to respective queues, in units
of blocks, that is, a single queue can be made up from 0 to m blocks, where m
is the total number of blocks available within a device. Also the total size of any
given queue must be in increments of 256 x40. For the IDT72P51767 and
IDT72P51777 the Total Available Memory is 1024 and 512 blocks respectively
(a block being 256 x40). Queues can be built from these blocks to make any
size queue desired and any number of queues desired.
BUS WIDTHS
The device provides the user with Bus Matching options such that the input port
and output port can be either x20, x40 bits wide, the read and write port widths
can be set independently of one another. Because a ports are common to all
queues the width of the queues is not individually set. The input width of all queues
are the same and the output width of all queues are the same.
WRITING TO & READING FROM THE MULTI-QUEUE
queue via the write queue address input. Conversely, data being read from the
device read port is read from a queue selected via the read queue address input.
Data can be simultaneously written into and read from the same queue or
different queues. Once a queue is selected for data writes or reads, the writing
and reading operation is performed in the same manner as a conventional IDT
synchronous FIFO, utilizing clocks and enables, there is a single clock and
enable per port. When a specific queue is addressed on the write port, data
placed on the data inputs is written to that queue sequentially based on the rising
edge of a write clock provided setup and hold times are met. Conversely, data
is read on to the output port after an access time from a rising edge on a read
clock.
FIFO operating in standard IDT mode. Write operations can be performed on
the write port provided that the queue currently selected is not full, a full flag output
provides status of the selected queue. When a queue is selected on the output
port, the next word in that queue will be available for reading on the output
register. All subsequent words from that queue require an enabled read cycle.
Data cannot be read from a selected queue if that queue is empty, the read port
provides an Empty flag indicating when data read out is valid. If the user switches
to a queue that is empty, the last word from the previous queue will remain on
the output bus. The device can operate in IDT Standard mode or BOI mode.
In IDT Standard mode the read port provides a word to the output bus (Qout)
for each clock cycle that REN is asserted. Refer to Figure 46, SDR Read Queue
Select, Read Operation (IDT Mode).
queue. Along with the full flag a dedicated almost full flag is provided, this almost
full flag is similar to the almost full flag of a conventional IDT FIFO. The device
provides a user programmable almost full flag for all 128 queues and when a
IDT72P51767/72P51777 1.8V, MULTI-QUEUE FLOW-CONTROL DEVICES
(128 QUEUES) 40 BIT WIDE CONFIGURATION 5,898,240 and 11,796,480 bits
The IDT multi-queue flow-control device has a single data input port and
The memory is organized into what is known as “blocks”, each block being
The input port is common to all queues within the device, as is the output port.
Data being written into the device via the input port is directed to a discrete
The operation of the write port is comparable to the function of a conventional
As mentioned, the write port has a full flag, providing full status of the selected
8
respective queue is selected on the write port, the almost full flag provides status
for that queue. Conversely, the read port has an Empty flag, providing status
of the data being read from the queue selected on the read port. As well as the
Empty flag the device provides a dedicated almost empty flag. This almost empty
flag is similar to the almost empty flag of a conventional IDT FIFO. The device
provides a user programmable almost empty flag for each 128 queues and
when a respective queue is selected on the read port, the almost empty flag
provides status for that queue.
PROGRAMMABLE FLAG BUSSES
Ready & almost empty on the read port, there are two flag status busses. An
almost full flag status bus is provided, this bus is 8 bits wide. Also, an almost empty
flag status bus is provided, again this bus is 8 bits wide. The purpose of these
flag busses is to provide the user with a means by which to monitor the data levels
within queues that may not be selected on the write or read port. As mentioned,
the device provides almost full and almost empty registers (programmable by
the user) for each of the 128 queues in the device.
has the option of utilizing 1 to 128 queues, therefore the 8 bit flag status busses
are multiplexed between the 128 queues, a flag bus can only provide status for
8 of the 128 queues at any moment, this is referred to as a “Status Word”, such
that when the bus is providing status of queues 1 through 8, this is status word
1, when it is queues 9 through 16, this is status word 2 and so on up to status
word 16. If less than 128 queues are setup in the device, there are still 4 status
words, such that in “Polled” mode of operation the flag bus will still cycle through
4 status words. If for example only 22 queues are setup, status words 1 and
2 will reflect status of queues 1 through 8 and 9 through 16 respectively. Status
word 3 will reflect the status of queues 17 through 22 on the least significant 6
bits, the most significant 2 bits of the flag bus are don’t care. The remaining status
words are not used as there are no queues to report.
“Polled” or “Direct”. When operating in polled mode a flag bus provides status
of each status word sequentially, that is, on each rising edge of a clock the flag
bus is updated to show the status of each status word in order. The rising edge
of the write clock will update the almost full bus and a rising edge on the read
clock will update the almost empty bus. The mode of operation is always the same
for both the almost full and almost empty flag busses. When operating in direct
mode, the status word on the flag bus is selected by the user. So the user can
actually address the status word to be placed on the flag status busses, these
flag busses operate independently of one another. Addressing of the almost full
flag bus is done via the write port and addressing of the almost empty flag bus
is done via the read port.
EXPANSION
depth or queue expansion. Depth Expansion means expanding the depths of
individual queues. Queue expansion means increasing the total number of
queues available. Depth expansion is possible by virtue of the fact that more
memory blocks within a multi-queue device can be allocated to a fewer number
of queues to increase the depth of each queue. For example, depth expansion
of 2 devices provides the possibility of 2 queues, each queue being setup within
a single device utilizing all memory blocks available to produce a single queue.
This is the deepest queue that can setup within a device.
may be setup. If fewer queues are desired, then more memory blocks will be
available to increase queue depths if desired. Refer to Figure 61, Connecting
two 10G Multi-Queue 128Q devices in Expansion Mode, and Figure 62,
In addition to these dedicated flags, full & almost full on the write port and Output
In the IDT72P51767/72P51777 multi-queue flow-control devices the user
The flag busses are available in two user selectable modes of operation,
Expansion of multi-queue devices is possible. Expansion achieves either
For queue expansion a maximum number of 256 queues (2 x 128 queues)
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
FEBRUARY 11, 2009

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