ADC1415S125/DB,598 NXP Semiconductors, ADC1415S125/DB,598 Datasheet - Page 30

BOARD DEMO FOR ADC1415S125

ADC1415S125/DB,598

Manufacturer Part Number
ADC1415S125/DB,598
Description
BOARD DEMO FOR ADC1415S125
Manufacturer
NXP Semiconductors
Type
A/Dr

Specifications of ADC1415S125/DB,598

Number Of Adc's
1
Number Of Bits
14
Sampling Rate (per Second)
125M
Data Interface
Serial, SPI™
Inputs Per Adc
1 Differential
Input Range
1 ~ 2 Vpp
Power (typ) @ Conditions
840mW @ 125Msps
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC1415S125
Product
Data Conversion Development Tools
Conversion Rate
125 MSPS
Resolution
14 bit
Interface Type
SMA
For Use With/related Products
ADC1415S125
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-5094
NXP Semiconductors
ADC1415S_SER
Product data sheet
Fig 29. Default mode at start-up: SCLK LOW = offset binary; SDIO HIGH = LVDS DDR
Fig 30. Default mode at start-up: SCLK HIGH = two’s complement; SDIO LOW = CMOS
(CMOS LVDS DDR)
(CMOS LVDS DDR)
All information provided in this document is subject to legal disclaimers.
Single 14-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
SDIO
SDIO
Rev. 4 — 17 December 2010
CS
CS
Offset binary, LVDS DDR
default mode at start-up
two's complement, CMOS
default mode at start-up
ADC1415S series
© NXP B.V. 2010. All rights reserved.
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