ADC1415S125/DB,598 NXP Semiconductors, ADC1415S125/DB,598 Datasheet - Page 37

BOARD DEMO FOR ADC1415S125

ADC1415S125/DB,598

Manufacturer Part Number
ADC1415S125/DB,598
Description
BOARD DEMO FOR ADC1415S125
Manufacturer
NXP Semiconductors
Type
A/Dr

Specifications of ADC1415S125/DB,598

Number Of Adc's
1
Number Of Bits
14
Sampling Rate (per Second)
125M
Data Interface
Serial, SPI™
Inputs Per Adc
1 Differential
Input Range
1 ~ 2 Vpp
Power (typ) @ Conditions
840mW @ 125Msps
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC1415S125
Product
Data Conversion Development Tools
Conversion Rate
125 MSPS
Resolution
14 bit
Interface Type
SMA
For Use With/related Products
ADC1415S125
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-5094
NXP Semiconductors
Table 32.
Default values are highlighted.
ADC1415S_SER
Product data sheet
Bit
7 to 4
3
2 to 0
Symbol
-
BIT/BYTE_WISE
LVDS_INTTER[2:0]
LVDS DDR output register 2 (address 0022h) bit description
Access
R/W
R/W
All information provided in this document is subject to legal disclaimers.
Single 14-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
Value
0000
0
1
000
001
010
011
100
101
110
111
Rev. 4 — 17 December 2010
Description
not used
DDR mode for LVDS output
internal termination for LVDS buffer (DAV and DATA)
bit wise (even data bits output on DAV rising edge / odd data
bits output on DAV falling edge)
byte wise (MSB data bits output on DAV rising edge / LSB data
bits output on DAV falling edge)
no internal termination
300 Ω
180 Ω
110 Ω
150 Ω
100 Ω
81 Ω
60 Ω
ADC1415S series
© NXP B.V. 2010. All rights reserved.
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