ADC1415S125/DB,598 NXP Semiconductors, ADC1415S125/DB,598 Datasheet - Page 4

BOARD DEMO FOR ADC1415S125

ADC1415S125/DB,598

Manufacturer Part Number
ADC1415S125/DB,598
Description
BOARD DEMO FOR ADC1415S125
Manufacturer
NXP Semiconductors
Type
A/Dr

Specifications of ADC1415S125/DB,598

Number Of Adc's
1
Number Of Bits
14
Sampling Rate (per Second)
125M
Data Interface
Serial, SPI™
Inputs Per Adc
1 Differential
Input Range
1 ~ 2 Vpp
Power (typ) @ Conditions
840mW @ 125Msps
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC1415S125
Product
Data Conversion Development Tools
Conversion Rate
125 MSPS
Resolution
14 bit
Interface Type
SMA
For Use With/related Products
ADC1415S125
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-5094
NXP Semiconductors
6. Pinning information
ADC1415S_SER
Product data sheet
Fig 2.
index area
terminal 1
VDDA5V
VDDA3V
AGND
AGND
AGND
REFB
REFT
Pin configuration with CMOS digital outputs
selected
VCM
INM
INP
10
1
2
3
4
5
6
7
8
9
6.1 Pinning
6.2 Pin description
Table 2.
Symbol
REFB
REFT
AGND
VCM
VDDA5V
AGND
INM
INP
AGND
VDDA3V
VDDA3V
CLKP
CLKM
DEC
OE
PWD
Transparent top view
ADC1415S
HVQFN40
Pin description (CMOS digital outputs)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
All information provided in this document is subject to legal disclaimers.
Single 14-bit ADC; input buffer; CMOS or LVDS DDR digital outputs
005aaa102
Type
O
O
G
O
P
G
I
I
G
P
P
I
I
O
I
I
Rev. 4 — 17 December 2010
30
29
28
27
26
25
24
23
22
21
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
[1]
Fig 3.
Description
bottom reference
top reference
analog ground
common-mode output voltage
5 V analog power supply
analog ground
complementary analog input
analog input
analog ground
3 V analog power supply
3 V analog power supply
clock input
complementary clock input
regulator decoupling node
output enable, active LOW
power down, active HIGH
index area
terminal 1
VDDA5V
VDDA3V
AGND
AGND
AGND
REFB
REFT
VCM
INM
INP
Pin configuration with LVDS/DDR digital
outputs selected
10
1
2
3
4
5
6
7
8
9
ADC1415S series
Transparent top view
ADC1215S
HVQFN40
© NXP B.V. 2010. All rights reserved.
30
29
28
27
26
25
24
23
22
21
005aaa103
D0_D1_P
D0_D1_M
D2_D3_P
D2_D3_M
D4_D5_P
D4_D5_M
D6_D7_P
D6_D7_M
D8_D9_P
D8_D9_M
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