PIC18F13K22-I/ML Microchip Technology, PIC18F13K22-I/ML Datasheet - Page 242

• Manufacturer Part Number: PIC18F13K22-I/ML
• Description: IC MCU 8BIT 8KB FLASH 20-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F13K22-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, MSSP, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F1XK22/LF1XK22
REGISTER 20-3:
TABLE 20-1:
DS41365B-page 240
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4-0
Note 1:
VREFCON0
VREFCON1
VREFCON2
TRISA
Legend: Shaded cells are not used with the comparator voltage reference.
Note 1:
Name
U-0
—
PORTA pins are enabled based on oscillator configuration.
The output select bits are always right justified to ensure that any number of bits can be used without
affecting the register layout.
FVR1EN
Unimplemented: Read as ‘0’
DAC1R<4:0>: DAC1 Voltage Output Select bits
V
D1EN
Bit 7
OUT
REGISTERS ASSOCIATED WITH VOLTAGE REFERENCE
—
—
U-0
—
= ((V
VREFCON2: VOLTAGE REFERENCE CONTROL REGISTER 2
SOURCE
FVR1ST
D1LPS
Bit 6
—
—
W = Writable bit
‘1’ = Bit is set
+) - (V
U-0
—
DAC1OE
FVR1S1
TRISA5
Bit 5
SOURCE
—
DAC1R4
R/W-0
-))*(DAC1R<4:0>/(2^5)) + V
DAC1R4
FVR1S0
Preliminary
TRISA4
Bit 4
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DAC1R3
DAC1R3
D1PSS1
R/W-0
Bit 3
—
—
D1PSS0
DAC1R2
TRISA2
Bit 2
DAC1R2
—
SOURCE
R/W-0
-
DAC1R1
TRISA1
Bit 1
© 2009 Microchip Technology Inc.
—
—
x = Bit is unknown
DAC1R1
R/W-0
DAC1R0
TRISA0
D1NSS
Bit 0
—
DAC1R0
R/W-0
on page
Values
Reset
251
251
251
252
bit 0