PIC18F13K22-I/ML Microchip Technology, PIC18F13K22-I/ML Datasheet - Page 375

• Manufacturer Part Number: PIC18F13K22-I/ML
• Description: IC MCU 8BIT 8KB FLASH 20-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F13K22-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 17
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, MSSP, SPI, USART
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

RESET ............................................................................. 299
Reset State of Registers .................................................. 248
Resets ...................................................................... 241, 253
RETFIE ............................................................................ 300
RETLW ............................................................................ 300
RETURN .......................................................................... 301
Return Address Stack ........................................................ 26
Return Stack Pointer (STKPTR) ........................................ 27
Revision History ............................................................... 365
RLCF ................................................................................ 301
RLNCF ............................................................................. 302
RRCF ............................................................................... 302
RRNCF ............................................................................ 303
S
SCK .................................................................................. 131
SDI ................................................................................... 131
SDO ................................................................................. 131
SEC_IDLE Mode .............................................................. 230
SEC_RUN Mode .............................................................. 228
Serial Clock, SCK ............................................................ 131
Serial Data In (SDI) .......................................................... 131
Serial Data Out (SDO) ..................................................... 131
Serial Peripheral Interface. See SPI Mode.
SETF ................................................................................ 303
Shoot-through Current ..................................................... 125
Single-Supply ICSP Programming.
Slave Select (SS) ............................................................. 131
Slave Select Synchronization .......................................... 137
SLEEP ............................................................................. 304
Sleep Mode ...................................................................... 229
SLRCON Register .............................................................. 94
Software Simulator (MPLAB SIM) .................................... 320
SPBRG ............................................................................ 185
SPBRGH .......................................................................... 185
Special Event Trigger ....................................................... 205
Special Event Trigger. See Compare (ECCP Mode).
Special Features of the CPU ........................................... 253
Special Function Registers ................................................ 35
SPI Mode
SPI Mode (MSSP)
© 2009 Microchip Technology Inc.
T0CON (Timer0 Control) ............................................ 95
T1CON (Timer1 Control) ............................................ 99
T2CON (Timer2 Control) .......................................... 105
T3CON (Timer3 Control) .......................................... 107
TRISA (Tri-State PORTA) .......................................... 79
TRISB (Tri-State PORTB) .................................... 84, 88
TXSTA (Transmit Status and Control) ..................... 182
VREFCON0 ............................................................. 239
VREFCON1 ............................................................. 239
VREFCON2 ............................................................. 240
WDTCON (Watchdog Timer Control) ...................... 264
WPUA (Weak Pull-up PORTA) .................................. 80
WPUB (Weak Pull-up PORTB) .................................. 85
Brown-out Reset (BOR) ........................................... 253
Oscillator Start-up Timer (OST) ............................... 253
Power-on Reset (POR) ............................................ 253
Power-up Timer (PWRT) ......................................... 253
Map ............................................................................ 36
Typical Master/Slave Connection ............................ 135
Associated Registers ............................................... 139
Bus Mode Compatibility ........................................... 139
Effects of a Reset ..................................................... 139
Enabling SPI I/O ...................................................... 135
Master Mode ............................................................ 136
Operation ................................................................. 134
Preliminary
PIC18F1XK22/LF1XK22
SR Latch .......................................................................... 233
SRCON0 Register ........................................................... 234
SRCON1 Register ........................................................... 235
SS .................................................................................... 131
SSP
SSPADD Register ............................................................ 151
SSPCON1 Register ................................................. 133, 142
SSPCON2 Register ......................................................... 143
SSPMSK Register ........................................................... 150
SSPOV ............................................................................ 163
SSPOV Status Flag ......................................................... 163
SSPSTAT Register .................................................. 132, 141
Stack Full/Underflow Resets .............................................. 28
Standard Instructions ....................................................... 269
STATUS Register .............................................................. 40
STKPTR Register .............................................................. 27
SUBFSR .......................................................................... 315
SUBFWB ......................................................................... 304
SUBLW ............................................................................ 305
SUBULNK ........................................................................ 315
SUBWF ............................................................................ 305
SUBWFB ......................................................................... 306
SWAPF ............................................................................ 306
T
T0CON Register ................................................................ 95
T1CON Register ................................................................ 99
T2CON Register .............................................................. 105
T3CON Register .............................................................. 107
Table Pointer Operations (table) ........................................ 50
Table Reads/Table Writes ................................................. 28
TBLRD ............................................................................. 307
TBLWT ............................................................................ 308
Thermal Considerations ................................................... 339
Time-out in Various Situations (table) .............................. 245
Timer0 ............................................................................... 95
Timer1 ............................................................................... 99
Operation in Power Managed Modes ...................... 139
Serial Clock ............................................................. 131
Serial Data In ........................................................... 131
Serial Data Out ........................................................ 131
Slave Mode .............................................................. 137
Slave Select ............................................................. 131
Slave Select Synchronization .................................. 137
SPI Clock ................................................................. 136
Typical Connection .................................................. 135
Associated Registers ............................................... 235
Typical SPI Master/Slave Connection ..................... 135
R/W Bit ............................................................ 144, 145
Associated Registers ................................................. 97
Operation ................................................................... 96
Overflow Interrupt ...................................................... 97
Prescaler ................................................................... 97
Prescaler Assignment (PSA Bit) ................................ 97
Prescaler Select (T0PS2:T0PS0 Bits) ....................... 97
Prescaler. See Prescaler, Timer0.
Reads and Writes in 16-Bit Mode .............................. 96
Source Edge Select (T0SE Bit) ................................. 96
Source Select (T0CS Bit) .......................................... 96
Specifications .......................................................... 346
Switching Prescaler Assignment ............................... 97
16-Bit Read/Write Mode .......................................... 102
Associated Registers ............................................... 104
Interrupt ................................................................... 103
Modes of Operation ................................................. 102
Operation ................................................................. 100
DS41365B-page 373