PIC18F1320-I/SS Microchip Technology, PIC18F1320-I/SS Datasheet - Page 303

• Manufacturer Part Number: PIC18F1320-I/SS
• Description: IC MCU FLASH 4KX16 A/D 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1320-I/SS

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 7 bit
• Package: 20SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOPAC164018 - MODULE SKT PROMATEII 20SSOP
• Lead Free Status / Rohs Status: Details

Timing Diagrams and Specifications ................................ 257
© 2007 Microchip Technology Inc.
Time-out Sequence on POR w/PLL Enabled
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Time-out Sequence on Power-up
Timer0 and Timer1 External Clock .......................... 261
Transition for Entry to SEC_IDLE Mode .................... 24
Transition for Entry to SEC_RUN Mode .................... 26
Transition for Entry to Sleep Mode ............................ 22
Transition for Two-Speed Start-up
Transition for Wake from PRI_IDLE Mode ................. 23
Transition for Wake from RC_RUN Mode
Transition for Wake from SEC_RUN Mode
Transition for Wake from Sleep (HSPLL) ................... 22
Transition to PRI_IDLE Mode .................................... 23
Transition to RC_IDLE Mode ..................................... 25
Transition to RC_RUN Mode ..................................... 27
Capture/Compare/PWM Requirements
CLKO and I/O Requirements ................................... 259
EUSART Synchronous Receive Requirements ....... 264
EUSART Synchronous
External Clock Requirements .................................. 257
Internal RC Accuracy ............................................... 258
PLL Clock, HS/HSPLL Mode
Reset, Watchdog Timer, Oscillator
Timer0 and Timer1 External Clock
(MCLR Tied to V
(MCLR Not Tied to Vdd), Case 1 ....................... 39
(MCLR Not Tied to Vdd), Case 2 ....................... 39
(MCLR Tied to Vdd, Vdd Rise pwrt) ................... 39
(INTOSC to HSPLL) ......................................... 181
(RC_RUN to PRI_RUN) ..................................... 25
(HSPLL) ............................................................. 24
(All CCP Modules) ........................................... 263
Transmission Requirements ............................ 263
(V
Start-up Timer, Power-up Timer and
Brown-out Reset Requirements ....................... 261
Requirements ................................................... 262
DD
= 4.2V to 5.5V) ........................................ 258
DD
) ........................................... 40
Top-of-Stack Access .......................................................... 42
TSTFSZ ........................................................................... 231
Two-Speed Start-up ..................................................171, 181
Two-Word Instructions ....................................................... 46
TXSTA Register
W
Watchdog Timer (WDT) ............................................171, 180
WWW Address ................................................................ 302
WWW, On-Line Support ...................................................... 4
X
XORLW ............................................................................ 231
XORWF ........................................................................... 232
Example Cases .......................................................... 46
BRGH Bit ................................................................. 135
Associated Registers ............................................... 181
Control Register ....................................................... 180
During Oscillator Failure .......................................... 182
Programming Considerations .................................. 180
PIC18F1220/1320
DS39605F-page 301