PIC18F1320-I/SS Microchip Technology, PIC18F1320-I/SS Datasheet - Page 37

• Manufacturer Part Number: PIC18F1320-I/SS
• Description: IC MCU FLASH 4KX16 A/D 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F1320-I/SS

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 1 x 16 bit
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 7 bit
• Package: 20SSOP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOPAC164018 - MODULE SKT PROMATEII 20SSOP
• Lead Free Status / Rohs Status: Details

TABLE 4-1:
REGISTER 4-1:
TABLE 4-2:
© 2007 Microchip Technology Inc.
HSPLL
HS, XT, LP
EC, ECIO
RC, RCIO
INTIO1, INTIO2
Note 1: 66 ms (65.5 ms) is the nominal Power-up Timer (PWRT) delay.
Power-on Reset
RESET Instruction
Brown-out
MCLR during Power Managed
Run modes
MCLR during Power Managed
Idle modes and Sleep
WDT Time-out during Full
Power or Power Managed Run
MCLR during Full Power
Execution
Stack Full Reset (STVR = 1)
Stack Underflow Reset
(STVR = 1)
Stack Underflow Error (not an
actual Reset, STVR = 0)
WDT Time-out during Power
Managed Idle or Sleep
Interrupt Exit from Power
Managed modes
Legend: u = unchanged, x = unknown, – = unimplemented bit, read as ‘0’
Note 1:
Configuration
2: 2 ms is the nominal time required for the 4x PLL to lock.
3: The program memory bias start-up time is always invoked on POR, wake-up from Sleep, or on any exit
Oscillator
from power managed mode that disables the CPU and instruction execution.
Condition
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (0x000008h or 0x000018h).
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
RCON REGISTER BITS AND POSITIONS
bit 7
Note:
R/W-0
IPEN
66 ms
66 ms
(1)
Refer to Section 5.14 “RCON Register” for bit definitions.
PWRTEN = 0
+ 1024 T
Program
Counter
(1)
PC + 2
PC + 2
66 ms
66 ms
66 ms
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
U-0
—
+ 1024 T
Power-up
OSC
(1)
(1)
(1)
+ 2 ms
OSC
0--1 1100
0--0 uuuu
0--1 11u-
0--u 1uuu
0--u 10uu
0--u 0uuu
0--u uuuu
u--u uuuu
u--u 00uu
u--u u0uu
U-0
Register
—
RCON
(2)
(2)
and Brown-out
R/W-1
RI
RI
1024 T
1
0
1
u
u
u
u
u
u
u
PWRTEN = 1
1024 T
TO
5-10 μs
5-10 μs
5-10 μs
1
u
1
1
1
0
u
u
0
u
OSC
PIC18F1220/1320
R/W-1
TO
PD
+ 2 ms
OSC
1
u
1
u
0
u
u
u
0
0
(3)
(3)
(3)
POR
(2)
0
u
u
u
u
u
u
u
u
u
R/W-1
PD
BOR
0
u
0
u
u
u
u
u
u
u
1024 T
Low-Power Mode
STKFUL
R/W-1
POR
1024 T
Exit from
5-10 μs
5-10 μs
5-10 μs
0
u
u
u
u
u
u
1
u
u
u
u
DS39605F-page 35
OSC
+ 2 ms
OSC
(3)
(3)
(3)
STKUNF
R/W-1
BOR
0
u
u
u
u
u
u
u
1
1
u
u
(2)
bit 0