PIC18F6310-I/PT Microchip Technology, PIC18F6310-I/PT Datasheet - Page 141

• Manufacturer Part Number: PIC18F6310-I/PT
• Description: IC PIC MCU FLASH 4KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6310-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI/I2C/EUSART/AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 10-17: PORTJ FUNCTIONS
TABLE 10-18: SUMMARY OF REGISTERS ASSOCIATED WITH PORTJ
 2004 Microchip Technology Inc.
RJ0/ALE
RJ1/OE
RJ2/WRL
RJ3/WRH
RJ4/BA0
RJ5/CE
RJ6/LB
RJ7/UB
Legend:
PORTJ
LATJ
TRISJ
Pin Name
Name
PWR = Power Supply, O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Read PORTJ pin/Write PORTJ Data Latch
LATJ Data Output Register
Data Direction Control Register for PORTJ
Bit 7
Function
WRH
WRL
ALE
BA0
RJ0
RJ1
RJ2
RJ3
RJ4
RJ5
RJ6
RJ7
OE
CE
UB
LB
Bit 6
Setting
TRIS
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
0
1
x
Bit 5
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
PIC18F6310/6410/8310/8410
Type
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
Bit 4
Preliminary
LATJ<0> data output.
PORTJ<0> data input.
External memory interface address latch enable control output; takes
priority over digital I/O.
LATJ<1> data output.
PORTJ<1> data input.
External memory interface output enable control output; takes priority
over digital I/O.
LATJ<2> data output.
PORTJ<2> data input.
External memory bus write low byte control; takes priority over digital
I/O.
LATJ<3> data output.
PORTJ<3> data input.
External memory interface write high byte control output; takes priority
over digital I/O.
LATJ<4> data output.
PORTJ<4> data input.
External memory interface byte address 0 control output; takes priority
over digital I/O.
LATJ<5> data output.
PORTJ<5> data input.
External memory interface chip enable control output; takes priority
over digital I/O.
LATJ<6> data output.
PORTJ<6> data input.
External memory interface lower byte enable control output; takes
priority over digital I/O.
LATJ<7> data output.
PORTJ<7> data input.
External memory interface upper byte enable control output; takes
priority over digital I/O.
Bit 3
Bit 2
Description
Bit 1
Bit 0
DS39635A-page 139
Reset Values
on Page
60
60
59