PIC18F6310-I/PT Microchip Technology, PIC18F6310-I/PT Datasheet - Page 163

• Manufacturer Part Number: PIC18F6310-I/PT
• Description: IC PIC MCU FLASH 4KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6310-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 8KB (4K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SPI/I2C/EUSART/AUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 4
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

15.2
In Capture mode, the CCPR2H:CCPR2L register pair
captures the 16-bit value of the TMR1 or TMR3
registers when an event occurs on the CCP2 pin (RC1
or RE7, depending on device configuration). An event
is defined as one of the following:
• every falling edge
• every rising edge
• every 4th rising edge
• every 16th rising edge
The event is selected by the mode select bits,
CCP2M3:CCP2M0 (CCP2CON<3:0>). When a cap-
ture is made, the interrupt request flag bit, CCP2IF
(PIR2<1>), is set; it must be cleared in software. If
another capture occurs before the value in register
CCPR2 is read, the old captured value is overwritten by
the new captured value.
FIGURE 15-2:
 2004 Microchip Technology Inc.
Capture Mode
CCP2 pin
CCP3 pin
CCP1 pin
CAPTURE MODE OPERATION BLOCK DIAGRAM
CCP1CON<3:0>
CCP2CON<3:0>
CCP3CON<3:0>
Prescaler
÷ 1, 4, 16
Prescaler
÷ 1, 4, 16
Prescaler
÷ 1, 4, 16
Q1:Q4
Q1:Q4
4
4
Edge Detect
Edge Detect
Edge Detect
4
4
4
and
and
and
PIC18F6310/6410/8310/8410
Set CCP2IF
Set CCP3IF
Set CCP1IF
Preliminary
T3CCP1
T3CCP2
T3CCP2
T3CCP1
T3CCP2
T3CCP2
T3CCP1
T3CCP1
15.2.1
In Capture mode, the appropriate CCPx pin should be
configured as an input by setting the corresponding
TRIS direction bit.
15.2.2
The timers that are to be used with the capture feature
(Timer1 and/or Timer3) must be running in Timer mode
or Synchronized Counter mode. In Asynchronous
Counter mode, the capture operation may not work. The
timer to be used with each CCP module is selected in the
T3CON register (see Section 15.1.1 “CCP Modules
and Timer Resources”).
Note:
CCP PIN CONFIGURATION
If RC1/CCP2 or RE7/CCP2 is configured
as an output, a write to the port can cause
a capture condition.
TIMER1/TIMER3 MODE SELECTION
TMR3
Enable
TMR1
Enable
TMR3
Enable
TMR1
Enable
TMR3
Enable
TMR1
Enable
CCPR1H
CCPR2H
CCPR3H
TMR3H
TMR1H
TMR3H
TMR1H
TMR3H
TMR1H
CCPR1L
TMR3L
CCPR2L
CCPR3L
TMR1L
TMR1L
TMR1L
TMR3L
TMR3L
DS39635A-page 161