AT91SAM7S32B-AU Atmel, AT91SAM7S32B-AU Datasheet - Page 133

• Manufacturer Part Number: AT91SAM7S32B-AU
• Description: IC MCU ARM7 32KB FLASH 48LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S32B-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: 91S
• Device Core: ARM7TDMI
• Device Core Size: 32b
• Frequency (max): 55MHz
• Interface Type: SPI/TWI/USART
• Total Internal Ram Size: 8KB
• # I/os (max): 21
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 1.8/3.3V
• Operating Supply Voltage (max): 1.95/3.6V
• Operating Supply Voltage (min): 1.65/3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: AT91
• Maximum Speed: 55 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 21
• Number Of Timers: 3
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

20.2.5.5
20.2.5.6
6175K–ATARM–30-Aug-10
Flash General-purpose NVM Commands
Flash Security Bit Command
In the same way, the Clear Lock command (CLB) is used to clear lock bits. All the lock bits are
also cleared by the EA command.
Table 20-11. Set and Clear Lock Bit Command
Lock bits can be read using Get Lock Bit command (GLB). The n
n of the bit mask is set..
Table 20-12. Get Lock Bit Command
General-purpose NVM bits (GP NVM bits) can be set using the Set GPNVM command (SGPB).
This command also activates GP NVM bits. A bit mask is provided as argument to the com-
mand. When bit 0 of the bit mask is set, then the first GP NVM bit is activated.
In the same way, the Clear GPNVM command (CGPB) is used to clear general-purpose NVM
bits. All the general-purpose NVM bits are also cleared by the EA command. The general-pur-
pose NVM bit is deactivated when the corresponding bit in the pattern value is set to 1.
Table 20-13. Set/Clear GP NVM Command
General-purpose NVM bits can be read using the Get GPNVM Bit command (GGPB). The n
GP NVM bit is active when bit n of the bit mask is set..
Table 20-14. Get GP NVM Bit Command
A security bit can be set using the Set Security Bit command (SSE). Once the security bit is
active, the Fast Flash programming is disabled. No other command can be run. An event on the
Erase pin can erase the security bit once the contents of the Flash have been erased.
Step
1
2
Step
1
2
Step
1
2
Step
1
2
Handshake Sequence
Write handshaking
Write handshaking
Handshake Sequence
Write handshaking
Read handshaking
Handshake Sequence
Write handshaking
Write handshaking
Handshake Sequence
Write handshaking
Read handshaking
AT91SAM7S Series Preliminary
MODE[3:0]
CMDE
DATA
MODE[3:0]
CMDE
DATA
MODE[3:0]
CMDE
DATA
MODE[3:0]
CMDE
DATA
SLB or CLB
GLB
DATA[15:0] or DATA[7:0]
Bit Mask
DATA[15:0] or DATA[7:0]
Lock Bit Mask Status
0 = Lock bit is cleared
1 = Lock bit is set
DATA[15:0] or DATA[7:0]
SGPB or CGPB
GP NVM bit pattern value
DATA[15:0] or DATA[7:0]
GGPB
GP NVM Bit Mask Status
0 = GP NVM bit is cleared
1 = GP NVM bit is set
th
lock bit is active when the bit
133
th