AT91SAM7S32B-AU Atmel, AT91SAM7S32B-AU Datasheet - Page 428

IC MCU ARM7 32KB FLASH 48LQFP

AT91SAM7S32B-AU

Manufacturer Part Number
AT91SAM7S32B-AU
Description
IC MCU ARM7 32KB FLASH 48LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7S32B-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
91S
Device Core
ARM7TDMI
Device Core Size
32b
Frequency (max)
55MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
8KB
# I/os (max)
21
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
1.8/3.3V
Operating Supply Voltage (max)
1.95/3.6V
Operating Supply Voltage (min)
1.65/3V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
AT91
Maximum Speed
55 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
21
Number Of Timers
3
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7S32B-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT91SAM7S32B-AU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
AT91SAM7S32B-AU-999
Manufacturer:
Atmel
Quantity:
10 000
32.8.5
Name:
Access Type:
• CKS: Transmit Clock Selection
• CKO: Transmit Clock Output Mode Selection
• CKI: Transmit Clock Inversion
0 = The data outputs (Data and Frame Sync signals) are shifted out on Transmit Clock falling edge. The Frame sync signal
input is sampled on Transmit clock rising edge.
1 = The data outputs (Data and Frame Sync signals) are shifted out on Transmit Clock rising edge. The Frame sync signal
input is sampled on Transmit clock falling edge.
CKI affects only the Transmit Clock and not the output clock signal.
428
31
23
15
7
0x3-0x7
AT91SAM7S Series Preliminary
CKS
CKO
SSC Transmit Clock Mode Register
0x0
0x1
0x2
0x3
0x0
0x1
0x2
CKG
30
22
14
SSC_TCMR
Read-write
6
Selected Transmit Clock
Divided Clock
RK Clock signal
TK Pin
Reserved
Transmit Clock Output Mode
None
Continuous Transmit Clock
Transmit Clock only during data transfers
Reserved
CKI
29
21
13
5
28
20
12
4
PERIOD
STTDLY
CKO
27
19
11
3
26
18
10
2
START
25
17
9
1
6175K–ATARM–30-Aug-10
Input-only
CKS
TK pin
Output
Output
24
16
8
0

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