ATXMEGA64A1-AU Atmel, ATXMEGA64A1-AU Datasheet - Page 50

• Manufacturer Part Number: ATXMEGA64A1-AU
• Description: MCU AVR 64K FLASH 1.6V 100-TQFP
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA64A1-AU

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: EBI/EMI, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 78
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b, D/A 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATXMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 4 KB
• Interface Type: I2C/SPI/USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 78
• Number Of Timers: 8
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 12-bit)
• On-chip Dac: 2 (2-ch x 12-bit)
• Package: 100TQFP
• Device Core: AVR
• Family Name: XMEGA
• Maximum Speed: 32 MHz
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

29.1.5
29.1.6
29.1.7
29.1.8
8067M–AVR–09/10
Timer/Counter and AWEX functions
Communication functions
Oscillators, Clock and Event
Debug/System functions
RAS
2P
3P
OCnx
OCnx
OCnxLS
OCnxHS
SCL
SDA
SCLIN
SCLOUT
SDAIN
SDAOUT
XCKn
RXDn
TXDn
SS
MOSI
MISO
SCK
TOSCn
XTALn
CLKOUT
EVOUT
RESET
PDI_CLK
PDI_DATA
TCK
Output Compare Channel x for Timer/Counter n
Output Compare Channel x Low Side for Timer/Counter n
Output Compare Channel x High Side for Timer/Counter n
Serial Data for TWI
Serial Clock In for TWI when external driver interface is enabled
Serial Clock Out for TWI when external driver interface is enabled
Serial Data In for TWI when external driver interface is enabled
Transmitter Data for USART n
Timer Oscillator pin n
Input/Output for inverting Oscillator pin n
Program and Debug Interface Data pin
Row Access Strobe
2 Port Interface
3 Port Interface
Inverted Output Compare Channel x for Timer/Counter n
Serial Clock for TWI
Serial Data Out for TWI when external driver interface is enabled
Transfer Clock for USART n
Receiver Data for USART n
Slave Select for SPI
Master Out Slave In for SPI
Master In Slave Out for SPI
Serial Clock for SPI
Peripheral Clock Output
Event Channel 0 Output
Reset pin
Program and Debug Interface Clock pin
JTAG Test Clock
(SDRAM)
XMEGA A1
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