AT91M40800-33AU Atmel, AT91M40800-33AU Datasheet - Page 111

IC ARM7 MCU 100 LQFP

AT91M40800-33AU

Manufacturer Part Number
AT91M40800-33AU
Description
IC ARM7 MCU 100 LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91M40800-33AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100TQFP
Device Core
ARM7TDMI
Family Name
91M
Maximum Speed
33 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
32
Interface Type
EBI/USART
Number Of Timers
3
Processor Series
AT91Mx
Core
ARM7TDMI
Data Ram Size
8 KB
Maximum Clock Frequency
33 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
32
Interface
EBI/EMI, UART/USART
Ios
32
Memory Type
ROMless
Number Of Bits
32
Package Type
100-pin LQFP
Programmable Memory
0 Bytes
Timers
3-16-bit
Voltage, Range
1.8-3.6 V
Cpu Family
91M
Device Core Size
32b
Frequency (max)
33MHz
Program Memory Size
Not Required
Total Internal Ram Size
8KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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• NBSTOP: Number of Stop Bits
• MODE9: 9-bit Character Length (Code Label US_MODE9)
0 = CHRL defines character length.
1 = 9-bit character length.
• CKLO: Clock Output Select (Code Label US_CLKO)
0 = The USART does not drive the SCK pin.
1 = The USART drives the SCK pin if USCLKS[1] is 0.
1354D–ATARM–08/02
PAR: Parity Type
The interpretation of the number of stop bits depends on SYNC.
CHMODE: Channel Mode
0
0
0
0
1
1
0
0
1
1
0
0
1
1
CHMODE
NBSTOP
PAR
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
x
x
Asynchronous (SYNC = 0)
1 stop bit
1.5 stop bits
2 stop bits
Reserved
Mode Description
Normal Mode
The USART Channel operates as an Rx/Tx USART.
Automatic Echo
Receiver Data Input is connected to TXD pin.
Local Loopback
Transmitter Output Signal is connected to Receiver Input Signal.
Remote Loopback
RXD pin is internally connected to TXD pin.
Parity Type
Even Parity
Odd Parity
Parity forced to 0 (Space)
Parity forced to 1 (Mark)
No parity
Multi-drop mode
Synchronous (SYNC = 1)
1 stop bit
Reserved
2 stop bits
Reserved
US_CHMODE_REMODE_LOOPBACK
US_CHMODE_AUTOMATIC_ECHO
US_CHMODE_LOCAL_LOOPBACK
AT91X40 Series
US_PAR_MULTIDROP
US_CHMODE_NORMAL
US_NBSTOP_1_5
US_PAR_SPACE
US_PAR_EVEN
US_PAR_MARK
US_NBSTOP_1
US_NBSTOP_2
US_PAR_ODD
US_CHMODE
Code Label
US_PAR_NO
Code Label
US_NBSTOP
Code Label
US_PAR
111

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