AT91M40800-33AU Atmel, AT91M40800-33AU Datasheet - Page 125

IC ARM7 MCU 100 LQFP

AT91M40800-33AU

Manufacturer Part Number
AT91M40800-33AU
Description
IC ARM7 MCU 100 LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91M40800-33AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100TQFP
Device Core
ARM7TDMI
Family Name
91M
Maximum Speed
33 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
32
Interface Type
EBI/USART
Number Of Timers
3
Processor Series
AT91Mx
Core
ARM7TDMI
Data Ram Size
8 KB
Maximum Clock Frequency
33 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
32
Interface
EBI/EMI, UART/USART
Ios
32
Memory Type
ROMless
Number Of Bits
32
Package Type
100-pin LQFP
Programmable Memory
0 Bytes
Timers
3-16-bit
Voltage, Range
1.8-3.6 V
Cpu Family
91M
Device Core Size
32b
Frequency (max)
33MHz
Program Memory Size
Not Required
Total Internal Ram Size
8KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Timer Counter Operating
Modes
Trigger
1354D–ATARM–08/02
Figure 45. Clock Control
Each Timer Counter channel can independently operate in two different modes:
The Timer Counter Operating Mode is programmed with the WAVE bit in the TC Mode
Register. In Capture Mode, TIOA and TIOB are configured as inputs. In Waveform
Mode, TIOA is always configured to be an output and TIOB is an output if it is not
selected to be the external trigger.
A trigger resets the counter and starts the counter clock. Three types of triggers are
common to both modes, and a fourth external trigger is available to each mode.
The following triggers are common to both modes:
The Timer Counter channel can also be configured to have an external trigger. In Cap-
ture Mode, the external trigger signal can be selected between TIOA and TIOB. In
Waveform Mode, an external event can be programmed on one of the following signals:
TIOB, XC0, XC1 or XC2. This external event can then be programmed to perform a trig-
ger by setting ENETRG in TC_CMR.
If an external trigger is used, the duration of the pulses must be longer than the system
clock (MCK) period in order to be detected.
Whatever the trigger used, it will be taken into account at the following active edge of the
selected clock. This means that the counter value may not read zero just after a trigger,
especially when a low frequency signal is selected as the clock.
Capture Mode allows measurement on signals
Waveform Mode allows wave generation
Software Trigger: Each channel has a software trigger, available by setting SWTRG
in TC_CCR.
SYNC: Each channel has a synchronization signal SYNC. When asserted, this
signal has the same effect as a software trigger. The SYNC signals of all channels
are asserted simultaneously by writing TC_BCR (Block Control) with SYNC set.
Compare RC Trigger: RC is implemented in each channel and can provide a trigger
when the counter value matches the RC value if CPCTRG is set in TC_CMR.
Selected
Counter
Clock
Clock
Q
R
S
Trigger
CLKSTA
Q
CLKEN
R
S
AT91X40 Series
Event
Stop
CLKDIS
Disable
Event
125

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