AT91M40800-33AU Atmel, AT91M40800-33AU Datasheet - Page 99

IC ARM7 MCU 100 LQFP

AT91M40800-33AU

Manufacturer Part Number
AT91M40800-33AU
Description
IC ARM7 MCU 100 LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91M40800-33AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100TQFP
Device Core
ARM7TDMI
Family Name
91M
Maximum Speed
33 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
32
Interface Type
EBI/USART
Number Of Timers
3
Processor Series
AT91Mx
Core
ARM7TDMI
Data Ram Size
8 KB
Maximum Clock Frequency
33 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
Eeprom Memory
0 Bytes
Input Output
32
Interface
EBI/EMI, UART/USART
Ios
32
Memory Type
ROMless
Number Of Bits
32
Package Type
100-pin LQFP
Programmable Memory
0 Bytes
Timers
3-16-bit
Voltage, Range
1.8-3.6 V
Cpu Family
91M
Device Core Size
32b
Frequency (max)
33MHz
Program Memory Size
Not Required
Total Internal Ram Size
8KB
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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USART: Universal
Synchronous/
Asynchronous
Receiver/
Transmitter
Figure 36. USART Block Diagram
Pin Description
Each USART channel has the following external signals:
Notes:
1354D–ATARM–08/02
Name
RXD
SCK
TXD
1. After a hardware reset, the USART pins are not enabled by default (see “PIO: Parallel I/O Controller” on page 74). The user
2. If the user selects one of the internal clocks, SCK can be configured as a PIO.
USxIRQ
must configure the PIO Controller before enabling the transmitter or receiver.
MCK/8
Description
USART Serial clock can be configured as input or output:
SCK is configured as input if an External clock is selected (USCLKS[1] = 1)
SCK is driven as output if the External Clock is disabled (USCLKS[1] = 0) and Clock output is enabled (CLKO = 1)
Transmit Serial Data is an output
Receive Serial Data is an input
MCK
ASB
APB
AMBA
The AT91X40 Series provides two identical, full-duplex, universal synchronous/asyn-
chronous receiver/transmitters that interface to the APB and are connected to the
Peripheral Data Controller.
The main features are:
Peripheral Data Controller
Baud Rate Generator
Receiver
Channel
Programmable Baud Rate Generator
Parity, Framing and Overrun Error Detection
Line Break Generation and Detection
Automatic Echo, Local Loopback and Remote Loopback channel modes
Multi-drop Mode: Address Detection and Generation
Interrupt Generation
Two Dedicated Peripheral Data Controller channels
5-, 6-, 7-, 8- and 9-bit character length
Interrupt Control
Control Logic
Transmitter
Channel
Baud Rate Clock
USART Channel
Transmitter
Receiver
AT91X40 Series
Controller
Parallel
PIO:
I/O
RXD
TXD
SCK
99

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