ATMEGA1280V-8AU Atmel, ATMEGA1280V-8AU Datasheet - Page 165

• Manufacturer Part Number: ATMEGA1280V-8AU
• Description: IC MCU AVR 128K FLASH 100-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA1280V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Controller Family/series: AVR MEGA
• No. Of I/o's: 86
• Eeprom Memory Size: 4KB
• Ram Memory Size: 8KB
• Cpu Speed: 8MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.11.27 OCR5BH and OCR5BL – Output Compare Register 5 B
16.11.28 OCR5CH and OCR5CL –Output Compare Register 5 C
16.11.29 ICR1H and ICR1L – Input Capture Register 1
16.11.30 ICR3H and ICR3L – Input Capture Register 3
16.11.31 ICR4H and ICR4L – Input Capture Register 4
16.11.32 ICR5H and ICR5L – Input Capture Register 5
2549M–AVR–09/10
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNTn). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16-bit registers.
Bit
(0x12B)
(0x12A)
Read/Write
Initial Value
Bit
(0x12D)
(0x12C)
Read/Write
Initial Value
Bit
(0x87)
(0x86)
Read/Write
Initial Value
Bit
(0x97)
(0x96)
Read/Write
Initial Value
Bit
(0xA7)
(0xA6)
Read/Write
Initial Value
Bit
(0x127)
(0x126)
Read/Write
Initial Value
See “Accessing 16-bit Registers” on page 138.
R/W
R/W
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
7
0
7
0
R/W
R/W
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
6
0
6
0
ATmega640/1280/1281/2560/2561
R/W
R/W
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R/W
R/W
R/W
4
0
4
0
4
0
4
0
4
0
4
0
OCR5B[15:8]
OCR5C[15:8]
OCR5B[7:0]
OCR5C[7:0]
ICR1[15:8]
ICR3[15:8]
ICR4[15:8]
ICR5[15:8]
ICR1[7:0]
ICR3[7:0]
ICR4[7:0]
ICR5[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
1
0
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
OCR5BH
OCR5CH
OCR5BL
OCR5CL
ICR1H
ICR3H
ICR4H
ICR5H
ICR1L
ICR3L
ICR4L
ICR5L
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