ATMEGA1280V-8AU Atmel, ATMEGA1280V-8AU Datasheet - Page 83

• Manufacturer Part Number: ATMEGA1280V-8AU
• Description: IC MCU AVR 128K FLASH 100-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA1280V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Controller Family/series: AVR MEGA
• No. Of I/o's: 86
• Eeprom Memory Size: 4KB
• Ram Memory Size: 8KB
• Cpu Speed: 8MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.3.4
2549M–AVR–09/10
Alternate Functions of Port D
Table 12-11. Overriding Signals for Alternate Functions in PC3:PC0
The Port D pins with alternate functions are shown in
Table 12-12. Port D Pins Alternate Functions
The alternate pin configuration is as follows:
• T0 – Port D, Bit 7
T0, Timer/Counter0 counter source.
• T1 – Port D, Bit 6
T1, Timer/Counter1 counter source.
• XCK1 – Port D, Bit 5
XCK1, USART1 External clock. The Data Direction Register (DDD5) controls whether the clock
is output (DDD5 set) or input (DDD5 cleared). The XCK1 pin is active only when the USART1
operates in Synchronous mode.
• ICP1 – Port D, Bit 4
ICP1 – Input Capture Pin 1: The PD4 pin can act as an input capture pin for Timer/Counter1.
DIEOE
Signal
DIEOV
DDOE
Name
PUOE
PUOV
DDOV
PVOE
PVOV
Port Pin
AIO
DI
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
SRE • (XMM<5)
SRE • (XMM<5)
SRE • (XMM<5)
PC3/A11
A11
0
1
0
0
–
–
INT3/TXD1 (External Interrupt3 Input or USART1 Transmit Pin)
INT2/RXD1 (External Interrupt2 Input or USART1 Receive Pin)
INT0/SCL (External Interrupt0 Input or TWI Serial CLock)
INT1/SDA (External Interrupt1 Input or TWI Serial DAta)
ATmega640/1280/1281/2560/2561
XCK1 (USART1 External Clock Input/Output)
ICP1 (Timer/Counter1 Input Capture Trigger)
SRE • (XMM<6)
SRE • (XMM<6)
SRE • (XMM<6)
PC2/A10
T0 (Timer/Counter0 Clock Input)
T1 (Timer/Counter1 Clock Input)
A10
0
1
0
0
–
–
Alternate Function
Table
SRE • (XMM<7)
SRE • (XMM<7)
SRE • (XMM<7)
12-12.
PC1/A9
A9
0
1
0
0
–
–
SRE • (XMM<7)
SRE • (XMM<7)
SRE • (XMM<7)
PC0/A8
A8
0
1
0
0
–
–
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