ATMEGA1280V-8AU Atmel, ATMEGA1280V-8AU Datasheet - Page 336

• Manufacturer Part Number: ATMEGA1280V-8AU
• Description: IC MCU AVR 128K FLASH 100-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA1280V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Controller Family/series: AVR MEGA
• No. Of I/o's: 86
• Eeprom Memory Size: 4KB
• Ram Memory Size: 8KB
• Cpu Speed: 8MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

29.2
2549M–AVR–09/10
Fuse Bits
Table 29-2.
Notes:
The ATmega640/1280/1281/2560/2561 has three Fuse bytes.
page 337
Fuse bytes. Note that the fuses are read as logical zero, “0”, if they are programmed.
Table 29-3.
Note:
BLB1 Mode
Extended Fuse Byte
BODLEVEL2
BODLEVEL1
BODLEVEL0
1
2
3
4
1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed.
See
Memory Lock Bits
describe briefly the functionality of all the fuses and how they are mapped into the
“System and Reset Characteristics” on page 372
–
–
–
–
–
Lock Bit Protection Modes
Extended Fuse Byte
BLB12
(Note:)
(Note:)
(Note:)
1
1
0
0
BLB11
1
0
0
1
Bit No
ATmega640/1280/1281/2560/2561
7
6
5
4
3
2
1
0
Protection Type
No restrictions for SPM or (E)LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and
(E)LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
(E)LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
Brown-out Detector trigger level
Brown-out Detector trigger level
Brown-out Detector trigger level
(1)(2)
(Continued)
Description
–
–
–
–
–
for BODLEVEL Fuse decoding.
Table 29-3
through
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
Default Value
Table 29-5 on
1
1
1
1
1
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