ATMEGA1280V-8AU Atmel, ATMEGA1280V-8AU Datasheet - Page 94

• Manufacturer Part Number: ATMEGA1280V-8AU
• Description: IC MCU AVR 128K FLASH 100-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA1280V-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 86
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA128x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire/SPI/USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 86
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Package: 100TQFP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 8 MHz
• Controller Family/series: AVR MEGA
• No. Of I/o's: 86
• Eeprom Memory Size: 4KB
• Ram Memory Size: 8KB
• Cpu Speed: 8MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK503 - STARTER KIT AVR EXP MODULE 100PATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.3.9
2549M–AVR–09/10
Alternate Functions of Port J
Table 12-26. Overriding Signals for Alternate Functions in PH3:PH0
The Port J alternate pin configuration is as follows:
Table 12-27. Port J Pins Alternate Functions
• PCINT15:12 - Port J, Bit 6:3
PCINT15:12, Pin Change Interrupt Source 15:12. The PJ6:3 pins can serve as External Interrupt
Sources.
• XCK2/PCINT11 - Port J, Bit 2
XCK2, USART 2 External Clock. The Data Direction Register (DDJ2) controls whether the clock
is output (DDJ2 set) or input (DDJ2 cleared). The XCK2 pin is active only when the USART2
operates in synchronous mode.
PCINT11, Pin Change Interrupt Source 11. The PJ2 pin can serve as External Interrupt
Sources.
Signal Name
DIEOE
DIEOV
Port Pin
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
AIO
DI
PJ7
PJ6
PJ5
PJ4
PJ3
PJ2
PJ1
PJ0
OC4A ENABLE
PH3/OC4A
OC4A
XCK3/PCINT11 (USART3 External Clock or Pin Change Interrupt 11)
0
0
0
0
–
0
0
0
–
TXD3/PCINT10 (USART3 Transmit Pin or Pin Change Interrupt 10)
RXD3/PCINT9 (USART3 Receive Pin or Pin Change Interrupt 9)
ATmega640/1280/1281/2560/2561
XCK2 OUTPUT
XCK2 OUTPUT
PCINT15 (Pin Change Interrupt 15)
PCINT14 (Pin Change Interrupt 14)
PCINT13 (Pin Change Interrupt 13)
PCINT12 (Pin Change Interrupt 12)
XC2K INPUT
PH2/XCK2
ENABLE
ENABLE
XCK2
0
0
1
–
0
0
–
Alternate Function
–
PH1/TXD2
TXEN2
TXEN2
TXEN2
TXD2
0
1
–
0
0
0
–
PORTH0 • PUD
PH0/RXD2
RXEN2
RXEN2
RXD2
0
0
0
–
0
0
–
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