AT91SAM9XE512-QU Atmel, AT91SAM9XE512-QU Datasheet - Page 146
![MCU ARM9 512K FLASH 208-PQFP](/photos/6/73/67311/313-208-pqfp_sml.jpg)
AT91SAM9XE512-QU
Manufacturer Part Number
AT91SAM9XE512-QU
Description
MCU ARM9 512K FLASH 208-PQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM9XE128-QU.pdf
(860 pages)
Specifications of AT91SAM9XE512-QU
Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Controller Family/series
AT91SAM9xxxxx
No. Of I/o's
96
Ram Memory Size
32KB
Cpu Speed
180MHz
No. Of Timers
2
Rohs Compliant
Yes
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
2-Wire, EBI, I2S, SPI, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
96
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Package
208PQFP
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
180 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
For Use With
AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM9XE512-QU
Manufacturer:
VISHAY
Quantity:
40 000
Company:
Part Number:
AT91SAM9XE512-QU
Manufacturer:
Atmel
Quantity:
58
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Figure 20-3. Code Read Optimization in ARM Mode for FWS = 3
Note:
Figure 20-4. Code Read Optimization in ARM Mode for FWS = 4
Note:
146
Buffer 0 (128bits)
Buffer 1 (128bits)
Buffer 0 (128bits)
Buffer 1 (128bits)
ARM Request
Data To ARM
ARM Request
Flash Access
Master Clock
Flash Access
Data To ARM
Master Clock
When FWS is included between 1 and 3, in case of sequential reads, the first access takes (FWS+1) cycles, the other ones only
1 cycle.
When FWS is included between 4 and 10, in case of sequential reads, the first access takes (FWS+1) cycles, each first access
of the 128-bit read (FWS-2) cycles, and the others only 1 cycle.
(32-bit)
AT91SAM9XE128/256/512 Preliminary
(32-bit)
@Byte 0
@Byte 0
XXX
XXX
XXX
Bytes 0-15
Bytes 0-15
XXX
XXX
@4
0-3
XXX
@4
0-3
@8
4-7
@8
4-7
@12 @16
Bytes 16-31
8-11
@12 @16
8-11
Bytes 16-31
12-15
12-15
Bytes 0-15
@20
16-19 20-23
@24
@20
Bytes 0-15
16-19
@28 @32
Bytes 32-47
24-27
@24
20-23
28-31 32-35
@28 @32
Bytes 32-47
24-27
@36 @40
Bytes 16-31
28-31
Bytes 16-31
36-39
@44 @48 @52
6254C–ATARM–22-Jan-10
Bytes 48-63
@36 @40
Bytes 32-47
40-43
32-35
44-47
Bytes 48-63
36-39
Bytes 32-47
48-51
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