AT91SAM9XE512-QU Atmel, AT91SAM9XE512-QU Datasheet - Page 700

• Manufacturer Part Number: AT91SAM9XE512-QU
• Description: MCU ARM9 512K FLASH 208-PQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE512-QU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Controller Family/series: AT91SAM9xxxxx
• No. Of I/o's: 96
• Ram Memory Size: 32KB
• Cpu Speed: 180MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Package: 208PQFP
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 180 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

38.5.26.7
Register Name:
Address:
Access Type:
• ALE: Alignment Errors
An 8-bit register counting frames that are not an integral number of bytes long and have bad CRC when their length is trun-
cated to an integral number of bytes and are between 64 and 1518 bytes in length (1536 if bit 8 set in network configuration
register). This register is also incremented if a symbol error is detected and the frame is of valid length and does not have
an integral number of bytes.
38.5.26.8
Register Name:
Address:
Access Type:
• DTF: Deferred Transmission Frames
A 16-bit register counting the number of frames experiencing deferral due to carrier sense being active on their first attempt
at transmission. Frames involved in any collision are not counted nor are frames that experienced a transmit underrun.
700
31
23
15
31
23
15
–
–
–
7
–
–
7
AT91SAM9XE128/256/512 Preliminary
Alignment Errors Register
Deferred Transmission Frames Register
30
22
14
30
22
14
EMAC_ALE
0xFFFC4054
Read-write
–
–
–
6
EMAC_DTF
0xFFFC4058
Read-write
–
–
6
29
21
13
29
21
13
–
–
–
5
–
–
5
28
20
12
28
20
12
–
–
–
4
–
–
4
DTF
DTF
ALE
27
19
11
27
19
11
–
–
–
3
–
–
3
26
18
10
26
18
10
–
–
–
2
–
–
2
25
17
25
17
–
–
9
–
1
–
–
9
1
6254C–ATARM–22-Jan-10
24
16
24
16
–
–
8
–
0
–
–
8
0