EZ80F91NAA50EG Zilog, EZ80F91NAA50EG Datasheet - Page 299

• Manufacturer Part Number: EZ80F91NAA50EG
• Description: IC ACCLAIM MCU 256KB 144BGA
• Manufacturer: Zilog
• Series: eZ80® AcclaimPlus!™r

Specifications of EZ80F91NAA50EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: Ethernet, I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LBGA
• Processor Series: EZ80F91x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F910300ZCOG, eZ80F910200KITG
• Minimum Operating Temperature: - 40 C
• For Use With: 269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4565

Ethernet Media Access Controller
PS027001-0707
Note:
MII Interface
RxCLK
TxCLK
The Ethernet Media Access Controller (EMAC) is a full-function 10/100 Mbps media
access control module with a Media-Independent Interface (MII). When communicating
with an external PHY device, the eZ80F91 ASSP uses the MII to gain access to the
Ethernet network.
Figure 59
For additional information about the Ethernet protocol and using it with the eZ80F91
ASSP, refer to the IEEE 802.3 specification, 1998 edition, Section 22. The eZ80F91 ASSP
supports the IEEE 802.3 protocol with the following exception:
The eZ80F91 ASSP does not support the Giga Media Independent Interface (GMII)
referred to in the following sections of the IEEE 802.3 1998 version: section 22.1.5, sec-
tion 22.2.4, section 22.2.4.1.2, section 22.2.4.1.5, and section 22.2.4.1.6.
The EMAC is used for many different applications, including network interface, ethernet
switching, and test equipment designs. The EMAC includes the following blocks:
•
•
MDIO
RxDV
RxER
TxER
TxEN
MDC
CRS
COL
RxD
TxD
Central clock and reset module (not shown in the block diagram).
Host memory interface and transmit/receiver arbiter.
illustrates the EMAC block diagram.
Figure 59. EMAC Block Diagram
RxD/CTRL
Accept
Reject
RxFIFO
TxFIFO
CTRL
RxD
RxDMA
TxDMA
Ethernet Media Access Controller
Product Specification
eZ80F91 ASSP
291