C8051F360-GQ Silicon Laboratories Inc, C8051F360-GQ Datasheet - Page 15

• Manufacturer Part Number: C8051F360-GQ
• Description: IC 8051 MCU 32K FLASH 48TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F36xr

Specifications of C8051F360-GQ

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-TQFP, 48-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 39
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 17x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 4
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F360DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 21-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 48TQFP
• Device Core: 8051
• Family Name: C8051F36x
• Maximum Speed: 100 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1483 - ADAPTER PROGRAM TOOLSTICK F360770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1412 - BOARD TARGET/PROTO W/C8051F360336-1411 - DAUGHTER CARD TOOLSTCK C8051F362336-1410 - KIT DEV FOR C8051F360 FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1407

C8051F360/1/2/3/4/5/6/7/8/9
SFR Definition 11.6. MAC0BL: MAC0 B Low Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
SFR Definition 11.7. MAC0ACC3: MAC0 Accumulator Byte 3 . . . . . . . . . . . . . . . . . . 125
SFR Definition 11.8. MAC0ACC2: MAC0 Accumulator Byte 2 . . . . . . . . . . . . . . . . . 125
SFR Definition 11.9. MAC0ACC1: MAC0 Accumulator Byte 1 . . . . . . . . . . . . . . . . . 125
SFR Definition 11.10. MAC0ACC0: MAC0 Accumulator Byte 0 . . . . . . . . . . . . . . . . . 126
SFR Definition 11.11. MAC0OVR: MAC0 Accumulator Overflow . . . . . . . . . . . . . . . . 126
SFR Definition 11.12. MAC0RNDH: MAC0 Rounding Register High Byte . . . . . . . . . 126
SFR Definition 11.13. MAC0RNDL: MAC0 Rounding Register Low Byte . . . . . . . . . 127
SFR Definition 12.1. VDM0CN: VDD Monitor Control . . . . . . . . . . . . . . . . . . . . . . . . 131
SFR Definition 12.2. RSTSRC: Reset Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
SFR Definition 13.1. PSCTL: Program Store Read/Write Control . . . . . . . . . . . . . . . 142
SFR Definition 13.2. FLKEY: Flash Lock and Key . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
SFR Definition 13.3. FLSCL: Flash Memory Control . . . . . . . . . . . . . . . . . . . . . . . . . 143
SFR Definition 14.1. CCH0CN: Cache Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
SFR Definition 14.2. CCH0TN: Cache Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
SFR Definition 14.3. CCH0LC: Cache Lock Control . . . . . . . . . . . . . . . . . . . . . . . . . 151
SFR Definition 14.4. CCH0MA: Cache Miss Accumulator . . . . . . . . . . . . . . . . . . . . . 152
SFR Definition 14.5. FLSTAT: Flash Status
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
SFR Definition 15.1. EMI0CN: External Memory Interface Control . . . . . . . . . . . . . . 155
SFR Definition 15.2. EMI0CF: External Memory Configuration . . . . . . . . . . . . . . . . . 156
SFR Definition 15.3. EMI0TC: External Memory Timing Control . . . . . . . . . . . . . . . . 161
SFR Definition 16.1. OSCICL: Internal Oscillator Calibration. . . . . . . . . . . . . . . . . . . 170
SFR Definition 16.2. OSCICN: Internal Oscillator Control . . . . . . . . . . . . . . . . . . . . . 171
SFR Definition 16.3. OSCLCN: Internal L-F Oscillator Control . . . . . . . . . . . . . . . . . . 172
SFR Definition 16.4. CLKSEL: System Clock Selection . . . . . . . . . . . . . . . . . . . . . . . 174
SFR Definition 16.5. OSCXCN: External Oscillator Control . . . . . . . . . . . . . . . . . . . . 175
SFR Definition 16.6. PLL0CN: PLL Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
SFR Definition 16.7. PLL0DIV: PLL Pre-divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
SFR Definition 16.8. PLL0MUL: PLL Clock Scaler . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
SFR Definition 16.9. PLL0FLT: PLL Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
SFR Definition 17.1. XBR0: Port I/O Crossbar Register 0 . . . . . . . . . . . . . . . . . . . . . 188
SFR Definition 17.2. XBR1: Port I/O Crossbar Register 1 . . . . . . . . . . . . . . . . . . . . . 189
SFR Definition 17.3. P0: Port0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190
SFR Definition 17.4. P0MDIN: Port0 Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191
SFR Definition 17.5. P0MDOUT: Port0 Output Mode . . . . . . . . . . . . . . . . . . . . . . . . . 191
SFR Definition 17.6. P0SKIP: Port0 Skip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
SFR Definition 17.7. P0MAT: Port0 Match . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
SFR Definition 17.8. P0MASK: Port0 Mask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 192
SFR Definition 17.9. P1: Port1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
SFR Definition 17.10. P1MDIN: Port1 Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
SFR Definition 17.11. P1MDOUT: Port1 Output Mode . . . . . . . . . . . . . . . . . . . . . . . . 194
SFR Definition 17.12. P1SKIP: Port1 Skip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
SFR Definition 17.13. P1MAT: Port1 Match . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194
SFR Definition 17.14. P1MASK: Port1 Mask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
SFR Definition 17.15. P2: Port2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
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