C8051F360-GQ Silicon Laboratories Inc, C8051F360-GQ Datasheet - Page 195

IC 8051 MCU 32K FLASH 48TQFP

C8051F360-GQ

Manufacturer Part Number
C8051F360-GQ
Description
IC 8051 MCU 32K FLASH 48TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F36xr
Datasheets

Specifications of C8051F360-GQ

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
48-TQFP, 48-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
100MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
39
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 17x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
100 MHz
Number Of Programmable I/os
39
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F360DK
Minimum Operating Temperature
- 40 C
On-chip Adc
21-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
48TQFP
Device Core
8051
Family Name
C8051F36x
Maximum Speed
100 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1483 - ADAPTER PROGRAM TOOLSTICK F360770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1412 - BOARD TARGET/PROTO W/C8051F360336-1411 - DAUGHTER CARD TOOLSTCK C8051F362336-1410 - KIT DEV FOR C8051F360 FAMILY
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1407

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F360-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F360-GQ
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Part Number:
C8051F360-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F360-GQR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Bits 7–0: P1MASK[7:0]: Port1 Mask Value.
Bits 7–0: P2.[7:0]
SFR Page:
SFR Address:
SFR Page:
SFR Address:
P2.7
R/W
R/W
Bit7
Bit7
These bits select which Port pins will be compared to the value stored in P1MAT.
0: Corresponding P1.n pin is ignored and cannot cause a Port Match event.
1: Corresponding P1.n pin is compared to the corresponding bit in P1MAT.
Write - Output appears on I/O pins per Crossbar Registers.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P2MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P2MDIN. Directly reads Port
pin when configured as digital input.
0: P2.n pin is logic low.
1: P2.n pin is logic high.
0
0xE2
all pages
0xA0
P2.6
R/W
R/W
Bit6
Bit6
SFR Definition 17.14. P1MASK: Port1 Mask
P2.5
R/W
R/W
Bit5
Bit5
(bit addressable)
SFR Definition 17.15. P2: Port2
P2.4
R/W
R/W
Bit4
Bit4
C8051F360/1/2/3/4/5/6/7/8/9
Rev. 1.0
P2.3
R/W
R/W
Bit3
Bit3
P2.2
R/W
R/W
Bit2
Bit2
P2.1
R/W
R/W
Bit1
Bit1
P2.0
R/W
R/W
Bit0
Bit0
00000000
Reset Value
Reset Value
11111111
195

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