MC908GP32CFBE Freescale Semiconductor, MC908GP32CFBE Datasheet - Page 126

• Manufacturer Part Number: MC908GP32CFBE
• Description: IC MCU 8MHZ 32K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GP32CFBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Processor Series: HC08GP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Input/Output (I/O) Ports
Figure 12-15
When bit DDRDx is a logic 1, reading address $0003 reads the PTDx data latch. When bit DDRDx is a
logic 0, reading address $0003 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
126
PTDPUE Bit
Notes:
1. X = Don’t care
2. Hi-Z = High impedance
3. Writing affects data register, but does not affect input.
4. I/O pin pulled up to V
X
1
0
shows the port D I/O logic.
For those devices packaged in a 40-pin dual in-line package, PTD6 and
PTD7 are not connected. DDRD6 and DDRD7 should be set to a 1 to
configure PTD6 and PTD7 as outputs.
DDRD Bit
0
0
1
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
PTDPUEx
DD
by internal pullup device.
PTD Bit
X
X
X
(1)
Table 12-5. Port D Pin Functions
RESET
Figure 12-15. Port D I/O Circuit
MC68HC908GP32 Data Sheet, Rev. 10
I/O Pin Mode
Input, Hi-Z
Input, V
V
Output
DD
INTERNAL
PULLUP
DEVICE
DD
Table 12-5
(4)
(2)
NOTE
DDRDx
PTDx
Accesses to DDRD
DDRD7–DDRD0
DDRD7–DDRD0
DDRD7–DDRD0
Read/Write
summarizes the operation of the port D pins.
PTD7–PTD0
Read
Pin
Pin
Accesses to PTD
Freescale Semiconductor
PTDx
PTD7–PTD0
PTD7–PTD0
PTD7–PTD0
Write
(3)
(3)