MC908GP32CFBE Freescale Semiconductor, MC908GP32CFBE Datasheet - Page 170

• Manufacturer Part Number: MC908GP32CFBE
• Description: IC MCU 8MHZ 32K FLASH 44-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GP32CFBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 33
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Processor Series: HC08GP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

System Integration Module (SIM)
Figure 14-16
14.6.2 Stop Mode
In stop mode, the SIM counter is reset and the system clocks are disabled. An interrupt request from a
module can cause an exit from stop mode. Stacking for interrupts begins after the selected stop recovery
time has elapsed. Reset or break also causes an exit from stop mode.
The SIM disables the clock generator module outputs (CGMOUT and CGMXCLK) in stop mode, stopping
the CPU and peripherals. Stop recovery time is selectable using the SSREC bit in the mask option
register (MOR). If SSREC is set, stop recovery is reduced from the normal delay of 4096 CGMXCLK
cycles down to 32. This is ideal for applications using canned oscillators that do not require long startup
times from stop mode.
170
and
EXITSTOPWAIT
CGMXCLK
Note: EXITSTOPWAIT = RST pin, CPU interrupt, or break interrupt
External crystal applications should use the full stop recovery time by
clearing the SSREC bit unless the OSCSTOPEN bit is set in CONFIG2.
Figure 14-17
RST
IDB
IAB
IDB
IAB
$A6
Figure 14-16. Wait Recovery from Interrupt or Break
Figure 14-17. Wait Recovery from Internal Reset
$A6
$6E0B
$A6
show the timing for WAIT recovery.
$6E0B
$A6
MC68HC908GP32 Data Sheet, Rev. 10
$A6
$A6
CYCLES
$6E0C
32
$01
NOTE
$00FF
CYCLES
32
$0B
$00FE
$6E
RST VCT H RST VCT L
$00FD
$00FC
Freescale Semiconductor