M30853FWGP#U5 Renesas Electronics America, M30853FWGP#U5 Datasheet - Page 146
![IC M32C MCU FLASH 100LQFP](/photos/12/22/122256/m30853fwgp_u5_sml.jpg)
M30853FWGP#U5
Manufacturer Part Number
M30853FWGP#U5
Description
IC M32C MCU FLASH 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheets
1.M3087BFLGPU3.pdf
(364 pages)
2.M30853FHFPD5.pdf
(94 pages)
3.M30853FHFPU3.pdf
(544 pages)
Specifications of M30853FWGP#U5
Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
320KB (320K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30853FWGP#U5M30853FWGP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30853FWGP#U5M30853FWGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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R
R
e
E
v
ROT
[ Syntax ]
[ Operation ]
[ Function ]
[ Selectable src/dest ]
[ Flag Change ]
[ Description Example ]
J
Chapter 3
*1 Indirect instruction addressing [dest] can be used in all addressing except R0L/R0/R2R0, R0H/R2/-,
*2 When
*3 The range of values is - 8 < #IMM4 < +8. However, you cannot set 0.
1 .
Change
0
R0L/R0/R2R0
R1L/R1/R3R1
A0/A0/A0
dsp:8[A0]
dsp:16[A0]
dsp:24[A0]
#IMM4*
Conditions
9
ROT.size
Flag
0 .
B
• This instruction rotates
• The direction of rotate is determined by the sign of
• When
• When
• When (.W) is specified for the size specifier (.size) and
S :
Z :
C :
ROT.B
ROT.B
ROT.W
0
R1L/R1/R3R1, and R1H/R3/-.
0
(MSB) is transferred to MSB(LSB) and the C flag.
negative, bits are rotated right.
to 0, or greater than +8.
no flags are changed. When you set a value less than -17 or greater than +17, the result of rotation is
undefined.
order bits become 0.
3
1
2
9
0
3
0 -
U
0
The flag is set when the operation resulted in MSB = 1; otherwise cleared.
The flag is set when the operation resulted in 0; otherwise cleared.
The flag is set when the bit shifted out last is 1; otherwise cleared.
6
src
1
src
src
0 .
0
0
5
I
3 .
is an immediate, the number of rotates is - 8 to +8( 0). You cannot set values less than - 8, equal
A1/A1/A1
dsp:8[A1]
dsp:16[A1]
dsp:24[A1]
is R1H, you cannot choose R1 or R1H for
is a register, the number of rotates is -16 to +16. Although you can set 0, no bits are rotated and
Functions
1
src,dest
#1,R0L
#-1,R0L
R1H,R2
O
p
a
g
e
B
128
src
S
C
dest
R0H/R2/-
R1H/R3/-
[A0]
dsp:8[SB]
dsp:16[SB]
abs24
f o
Z
3
left or right the number of bits indicated by
3
5
D
MSB
C
[A1]
dsp:8[FB]
dsp:16[FB]
abs16
B , W
*4 When the number of rotates is 0, no flags are changed.
; Rotated left
; Rotated right
ROTate
dest/[dest]
Rotate
src
src
R0L/R0/R2R0
R1L/R1/R3R1*
A0/A0/A0
dsp:8[A0]
dsp:16[A0]
dsp:24[A0]
< 0
> 0
src
dest
. When
dest
.
is the address register(A0, A1), the 8 high-
LSB
[ Instruction Code/Number of Cycles ]
src
A1/A1/A1
dsp:8[A1]
dsp:16[A1]
dsp:24[A1]
2
is positive, bits are rotated left; when
src
. The bit overflowing from LSB
dest*
C
R0H/R2/-
R1H/R3/-*
[A0]
dsp:8[SB]
dsp:16[SB]
abs24
1
3.2
2
[A1]
dsp:8[FB]
dsp:16[FB]
abs16
ROT
Page= 275
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