C8051T633-GM Silicon Laboratories Inc, C8051T633-GM Datasheet - Page 26
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C8051T633-GM
Manufacturer Part Number
C8051T633-GM
Description
IC MCU 4KB 20PIN QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T63xr
Specifications of C8051T633-GM
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
17
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-QFN
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
UART, SPI, SMBus
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4 x 16-bit
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T630DK
Minimum Operating Temperature
- 40 C
For Use With
336-1464 - KIT DEV FOR C8051T630 FAMILY
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1461-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051T633-GM
Manufacturer:
Silicon
Quantity:
270
- Current page: 26 of 220
- Download datasheet (2Mb)
C8051T630/1/2/3/4/5
Table 5.4. Reset Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Table 5.5. Internal Voltage Regulator Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Table 5.6. EPROM Electrical Characteristics
26
Parameter
Input Voltage Range
Bias Current
Parameter
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Current
V
V
Missing Clock Detector
Timeout
Reset Time Delay
Minimum RST Low Time to
Generate a System Reset
V
V
Parameter
EPROM Size
EPROM Size
EPROM Size
Write Cycle Time (per Byte)
Programming Voltage
Notes:
DD
DD
DD
DD
1. 512 bytes at location 0x1E00 to 0x1FFF are not available for program storage.
2. Refer to device errata for details.
POR Ramp Time
Monitor Threshold (V
Monitor Turn-on Time
Monitor Supply Current
2
(V
PP
RST
)
Normal Mode
)
C8051T630/1
C8051T632/3
C8051T634/5
Date Code 0935 and later
Date Code prior to 0935
I
V
RST = 0.0 V
Time from last system clock
rising edge to reset initiation
Delay between release of any
reset source and code
execution at location 0x0000
V
OL
DD
DD
= 8.5 mA,
= 1.8 V to 3.6 V
= V
Conditions
RST
Conditions
Conditions
- 0.1 V
Rev. 1.0
8192
4096
2048
0.75 x V
5.75
6.25
Min
105
Min
500
1.7
15
—
—
—
—
—
—
—
1
Min
1.8
—
DD
6.375
Typ
155
6.0
—
—
—
1.75
Typ
625
25
50
20
—
—
—
—
—
—
Typ
30
—
Max
6.25
205
6.5
—
—
—
Max
750
0.6
0.6
1.8
50
60
30
—
—
—
Max
1
3.6
50
Units
bytes
bytes
bytes
µs
Units
V
V
Units
V
µA
ms
µA
µA
µs
µs
µs
µs
V
V
V
V
DD
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