MC908GR48ACFAE Freescale Semiconductor, MC908GR48ACFAE Datasheet - Page 223

IC MCU 48K FLASH 8MHZ 48-LQFP

MC908GR48ACFAE

Manufacturer Part Number
MC908GR48ACFAE
Description
IC MCU 48K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908GR48ACFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
ESCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
24-ch x 10-bit
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1.5KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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As an example, a 4.9152 MHz crystal, with the TMBCLKSEL set for divide-by-128 and the TBR2–TBR0
set to {011}, the divider is 16,384 and the interrupt rate calculates to:
16.6 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power- consumption standby modes.
16.6.1 Wait Mode
The timebase module remains active after execution of the WAIT instruction. In wait mode the timebase
register is not accessible by the CPU.
If the timebase functions are not required during wait mode, reduce the power consumption by stopping
the timebase before executing the WAIT instruction.
16.6.2 Stop Mode
The timebase module may remain active after execution of the STOP instruction if the oscillator has been
enabled to operate during stop mode through the OSCENINSTOP bit in the configuration register. The
timebase module can be used in this mode to generate a periodic wakeup from stop mode.
If the oscillator has not been enabled to operate in stop mode, the timebase module will not be active
during stop mode. In stop mode, the timebase register is not accessible by the CPU.
If the timebase functions are not required during stop mode, reduce power consumption by disabling the
timebase module before executing the STOP instruction.
Freescale Semiconductor
4.9152 x 10
Do not change TBR2–TBR0 bits while the timebase is enabled (TBON = 1).
16,384
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
TBR2
6
0
0
0
0
1
1
1
1
= 3.33 ms
Table 16-1. Timebase Divider Selection
TBR1
0
0
1
1
0
0
1
1
TBR0
0
1
0
1
0
1
0
1
NOTE
32,768
8192
2048
128
64
32
16
0
8
TMBCLKSEL
Divider
4,194,304
1,048,576
262144
16,384
8192
4096
2048
1024
1
Low-Power Modes
223

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