MC908GR48ACFAE Freescale Semiconductor, MC908GR48ACFAE Datasheet - Page 257
![IC MCU 48K FLASH 8MHZ 48-LQFP](/photos/12/27/122793/mc908gr48acfae_sml.jpg)
MC908GR48ACFAE
Manufacturer Part Number
MC908GR48ACFAE
Description
IC MCU 48K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GR32ACFJE.pdf
(314 pages)
Specifications of MC908GR48ACFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
ESCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
24-ch x 10-bit
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1.5KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR48ACFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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ELSxB and ELSxA — Edge/Level Select Bits
TOVx — Toggle-On-Overflow Bit
Freescale Semiconductor
When channel x is an input capture channel, these read/write bits control the active edge-sensing logic
on channel x.
When channel x is an output compare channel, ELSxB and ELSxA control the channel x output
behavior when an output compare occurs.
When ELSxB and ELSxA are both clear, channel x is not connected to port D or port F, and pin
PTDx/T2CHx or pin PTFx/T2CHx is available as a general- purpose I/O pin.
ELSxB and ELSxA work. Reset clears the ELSxB and ELSxA bits.
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the TIM2 counter overflows. When channel x is an input capture channel, TOVx has no
effect. Reset clears the TOVx bit.
1 = Channel x pin toggles on TIM2 counter overflow.
0 = Channel x pin does not toggle on TIM2 counter overflow.
MSxB
After initially enabling a TIM2 channel register for input capture operation
and selecting the edge sensitivity, clear CHxF to ignore any erroneous
edge detection flags.
When TOVx is set, a TIM2 counter overflow takes precedence over a
channel x output compare if both occur at the same time.
X
X
0
0
0
0
0
0
0
1
1
1
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
MSxA
X
X
X
0
1
0
0
0
1
1
1
1
Table 18-2. Mode, Edge, and Level Selection
ELSxB
0
0
0
1
1
0
0
1
1
0
1
1
ELSxA
0
0
1
0
1
0
1
0
1
1
0
1
Output compare
buffered PWM
NOTE
NOTE
Output preset
Input capture
compare or
Buffered
or PWM
output
Mode
Pin under port control;
initial output level high
Pin under port control;
initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising
or falling edge
Software compare only
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Configuration
Table 18-2
shows how
I/O Registers
257
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